📱 Bytecode Design

Instruction Sets, Stack Machines, Register Allocation, Intermediate Representations

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Decoding Exception Entry & Exit on ARM Cortex-Mx
dev.to·11h·
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📜Bytecode Interpreters
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Vibe Code Warning – from 1k to 10k lines, a personal casestudy
lobste.rs·3h·
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💬Error Messages
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Virtualization: Theory to Silicon
pooladkhay.com·12h·
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🖥️Minimal VMs
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Seeking advice on building a strong C++ gameplay portfolio
reddit.com·1h·
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🧸Toy Compilers
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Why is calling my asm function from Rust slower than calling it from C?
ohadravid.github.io·11h·
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📜Bytecode Interpreters
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Cheney on the M.T.A.
plover.com·2d
🔄Tail Recursion
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Software Architecture with C++: Designing robust C++ systems with modern architectural practices, Edition 2 by Andrey Gavrilin, Adrian Ostrowski, Piotr Gaczkowski
play.google.com·2d·
Discuss: r/cpp
💬Smalltalk VMs
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Optimizing for the edge: Lessons from DOS, Turbo Pascal, and hardware constraints
allthingsopen.org·11h
🎯99-Line Tools
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The Compiler Is Your Best Friend, Stop Lying to It
blog.daniel-beskin.com·2d·
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🥾Bootstrapping Strategies
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AI Chip Development Solutions
synopsys.com·1d
🎭Program Synthesis
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From Silicon to Darude Sand-storm: breaking famous synthesizer DSPs (39c3)
cdn.media.ccc.de·1h
🔢Bit Manipulation
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Writing an NES emulator in Haskell
arthi-chaud.github.io·2d·
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🧸Toy Compilers
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A Validated Semantics for LLVM IR
sf.snu.ac.kr·14h
🔧LLVM IR
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Switching It Up a Bit
xania.org·4d·
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📚Stack Allocation
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jart/jtckdint: C23 Checked Arithmetic
github.com·1d
🧸Toy Compilers
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Meeting Seed7
genodians.org·1d
🌱Forth Kernels
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Improved Simulation of Stabilizer Circuits
paperium.net·18h·
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⚡Control Synthesis
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T3X.ORG nmhbasic/index
t3x.org·12h·
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💻Terminal Control
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Department of Computer Science and Technology – Technical reports: UCAM-CL-TR-949
cl.cam.ac.uk·4h·
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🏰Capability Machines
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From Intent to Proof: Dafny Verification for Web Apps
midspiral.com·1d·
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🎯Symbolic Execution
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