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CPU Architecture
🖥️ CPU Architecture
microarchitecture, instruction pipeline, cache hierarchy, SIMD
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72
posts in
6.3
ms
SWIFT: Shallow and
SIMD-Aware
CKKS Functional Bootstrapping for
Low-Latency
⚙️
Systems programming
eprint.iacr.org
·
6d
6 days ago
Actions for SWIFT: Shallow and SIMD-Aware CKKS Functional Bootstrapping for Low-Latency
The Tick-Tock AI Development Cycle.
⚙️
Systems programming
wilsoniumite.com
·
5h
5 hours ago
Actions for The Tick-Tock AI Development Cycle.
Release v3.3.0 · jkool702/forkrun
⚡
Zig
Content type:
Code
github.com
·
2d
2 days ago
Actions for Release v3.3.0 · jkool702/forkrun
uiCA: Accurate Throughput
Prediction
of Basic Blocks on Recent Intel
Microarchitectures
🔧
Compilers
Content type:
Academic
arxiv.org
·
22h
22 hours ago
·
Hacker News
Actions for uiCA: Accurate Throughput Prediction of Basic Blocks on Recent Intel Microarchitectures
HFT
Latency
Monitoring with Probabilistic Calling Context
📈
Profiling
hftuniversity.com
·
1d
1 day ago
·
Hacker News
Actions for HFT Latency Monitoring with Probabilistic Calling Context
Why my
SIMD
code was silently running as scalar, and what debugging it taught me about production environment assumptions
🦀
Rust
Content type:
Blog
coloneltoad.substack.com
·
6d
6 days ago
·
Substack
Actions for Why my SIMD code was silently running as scalar, and what debugging it taught me about production environment assumptions
Massive AI Storage Demand Creates a New Memory Wall
🗄️
Storage Engines
Content type:
News
eetimes.com
·
6h
6 hours ago
Actions for Massive AI Storage Demand Creates a New Memory Wall
Intel 8086, the First x86 chip, Enters its 50th Year in 2027
🔩
Assembly
techpowerup.com
·
1d
1 day ago
Actions for Intel 8086, the First x86 chip, Enters its 50th Year in 2027
ESP32-S31
⚙️
Systems programming
Content type:
Discussion
news.ycombinator.com
·
6d
6 days ago
·
Hacker News
Actions for ESP32-S31
The Return of Rigorous Full-System Timing
Simulation
🧠
Memory Management
sigarch.org
·
2d
2 days ago
·
Hacker News
Actions for The Return of Rigorous Full-System Timing Simulation
Elasticsearch
simdvec
deep-dive: Walking the memory tightrope to 2x better vector throughput
⚙️
C++
Content type:
Blog
elastic.co
·
5d
5 days ago
Actions for Elasticsearch simdvec deep-dive: Walking the memory tightrope to 2x better vector throughput
Apple Chip
Architecture
from 1977 to 2026
🔩
Assembly
Content type:
News
Content type:
Blog
blog.jacobstechtavern.com
·
1d
1 day ago
Actions for Apple Chip Architecture from 1977 to 2026
How much do amd64
microarchitecture
levels help in Go?
🔩
Assembly
Content type:
Blog
lemire.me
·
4d
4 days ago
·
Lobsters
,
Hacker News
,
r/golang
Actions for How much do amd64 microarchitecture levels help in Go?
Exploiting GPU Tensor Cores from Java using Babylon [Juan Fumero]
🔀
Concurrency
openjdk.org
·
1d
1 day ago
·
r/java
Actions for Exploiting GPU Tensor Cores from Java using Babylon [Juan Fumero]
Sassy: fuzzy searching DNA sequences using
SIMD
🔩
Assembly
curiouscoding.nl
·
6d
6 days ago
Actions for Sassy: fuzzy searching DNA sequences using SIMD
Fast Exact Nearest-Neighbor Learning for High-Frequency Financial Time Series
🔩
Assembly
Content type:
Academic
arxiv.org
·
16h
16 hours ago
Actions for Fast Exact Nearest-Neighbor Learning for High-Frequency Financial Time Series
Latency-Aware
, High-Throughput Homomorphic AES Evaluation with CKKS
⚙️
Systems programming
eprint.iacr.org
·
2d
2 days ago
Actions for Latency-Aware, High-Throughput Homomorphic AES Evaluation with CKKS
CoreML vs TFLite: iPhone 15 Pro GPU 2.3x Faster
🎮
Game Dev
Content type:
Blog
Content type:
Discussion
tildalice.io
·
4d
4 days ago
Actions for CoreML vs TFLite: iPhone 15 Pro GPU 2.3x Faster
Why x86 Zeroes a Register With `xor eax, eax`
🔩
Assembly
Content type:
Blog
debasishg.github.io
·
2d
2 days ago
Actions for Why x86 Zeroes a Register With `xor eax, eax`
jeffhuen/RustyCSV: High-performance CSV parsing for Elixir. Rust NIF with
SIMD
acceleration, parallel parsing, and bounded-memory streaming. Drop-in NimbleCSV replacement.
🦀
Rust
Content type:
Code
github.com
·
4d
4 days ago
·
Hacker News
Actions for jeffhuen/RustyCSV: High-performance CSV parsing for Elixir. Rust NIF with SIMD acceleration, parallel parsing, and bounded-memory streaming. Drop-in NimbleCSV replacement.
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