🔧 LLVM - coyestpineal3l · Scour

[RFC]: vLLM IR: A Functional Intermediate Representation for vLLM · Issue #32358 🦀MIR

github.com·2d·Hacker News

What I learned from improving Unity's Mono codegen, part 1 🦺Cranelift

blog.s-schoener.com·3d·Hacker News

ZeroCoder: Can LLMs Improve Code Generation Without Ground-Truth Supervision? 🔍Static Analysis

arxiv.org·12h

Excited to share my latest open-source project: KubeCost Guardian 🏗️Build Systems

techcommunity.microsoft.com·1h

Devlog ⚡ Incremental compilation with LLVM 🏗️Build Systems

ziggit.dev·2d

DDD Bounded Contexts: Clear Domain Boundaries for LLM Code Generation 🔌LSP

understandingdata.com·23h·Hacker News

#640, April 6th 2026 🔌LSP

llvmweekly.org·3d

Bespoke OLAP: Using AI to Synthesize Workload-Specific Database Engines from Scratch 🦺Cranelift

ucbskyadrs.github.io·17h·Hacker News

Prevent confidential data leaks at compile time with labelled types in Sigil 🔍Static Analysis

inerte.github.io·1d·Hacker News

Multi-objective optimization of a hybrid gas turbine combined cycle system with LNG cold energy integration 🦺Cranelift

sciencedirect.com·1h

Chip Industry Week In Review 🦺Cranelift

semiengineering.com·9h

I’m building “Grammarly for LLMs” and I need blunt feedback on whether the optimization is actually useful 🔌LSP

prompt-grader.app·6d·r/PromptEngineering, r/SideProject

Presentation: State of Play: AI Coding Assistants 🔍Static Analysis

infoq.com

·2d

Tesla FSD v14.3 rolls out with MLIR rewrite, 20% faster reactions 🦺Cranelift

electrek.co·2d

Current State of LLM-Based Code Generation and Future Directions (2026) [video] 🪄Metaprogramming

youtube.com·4d·Hacker News

RUSTSEC-2026-0095: wasmtime: Wasmtime with Winch compiler backend may allow a sandbox-escaping memory access 🔌LSP

rustsec.org·1d

[RFC] JSIR: A High-Level IR for JavaScript 🦀MIR

discourse.llvm.org·4d·Lobsters, Hacker News, Hacker News, Hacker News

Data Optimization in Security: A Splunk Architect’s Perspective 🔍Static Analysis

blogs.cisco.com·2d

Aegis: a fully open-source FPGA, from the silicon up 🦺Cranelift

blog.adafruit.com·2d

Optimising a Pipelined RISC-V Core: From Naive Pipeline to Near-Superscalar Performance ⚡JIT

mummanajagadeesh.github.io·3d·Lobsters, Hacker News

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