BeagleBone PTP Master Clock Setup

This document provides a step-by-step guide to setting up a Precision Time Protocol (PTP) master clock on a BeagleBone platform. It covers kernel support verification, device tree overlay setup, initial configuration, and how to monitor the system’s operation. This setup achieves high-accuracy time synchronization on a cost-effective platform.

Hardware Components

1. BeagleBone Black (~70 dollars)
2. GNSS L86 Receivers (with PPS support) (~ 10 dollars)
3. 10 Mhz OCXO (CTI OC5SC25 OCXO) (~10 dollars) The schematics of the circuit/setup can be found in the repository.

Software components

1. Kernel Support Verification
2. Modified LinuxPTP Package
3. Building and Loading Device Tree Overlays
4. Initial Setup
5. Monitoring Operation

1. Kernel Support Verification

To start, verify that the Linux kernel on the BeagleBone includes the necessary support for CPTS (Common Platform Time Sync). This feature is crucial for enabling PTP functionality.

1. After building the kernel, run the following command on the BeagleBone to confirm CPTS support is enabled:

zcat /proc/config.gz | grep CONFIG_TI_CPTS

• If the output includes CONFIG_TI_CPTS=y, CPTS support is active. Otherwise, additional kernel configuration may be required.

2. Modified LinuxPTP Package

The standard LinuxPTP package can be obtained from this repository. In this application, a modification has been made to the "PI" servo (pi.c) to include an additional feature that handles invalid hardware timestamp push events caused by the BeagleBone Black timer.

To install the modified package, use the following command:

cd linuxptp-repo
make install

3. Building and Loading Device Tree Overlays

Device tree overlays are used to enable additional functionality on the BeagleBone hardware, such as an external clock input.

Steps

Clone the Project Repository: On the BeagleBone, clone the project’s source code repository. Ensure that the BeagleBone has an active internet connection.

git clone <repository_url>

Navigate to the Overlays Directory: Enter the Overlays directory within the cloned repository.

cd Overlays

• This folder contains device tree source files and additional instructions in its README.md file.
• Notably, a custom DTS file (device tree source) is included, adding support for the external clock through the TCLKIN pin.

Load the Device Tree Overlay:

• Open the /boot/uEnv.txt file, and add the line to load the BB-TCLKIN-00A0.dtbo overlay:

dtb_overlay=/lib/firmware/BB-TCLKIN-00A0.dtbo

• Save the file, then reboot the BeagleBone to apply the overlay:

sudo reboot

4. Initial Setup

With the kernel and device tree overlays in place, configure the necessary GPIO pins and compile the main program.

Steps

Configure GPIO Pins: Set the required GPIO pins using the config-pin command:

config-pin p8.10 timer   # Set P8.10 to timer mode for DMTIMER 6
config-pin p9.19 i2c     # Set P9.19 for I2C - SCL
config-pin p9.20 i2c     # Set P9.20 for I2C - SDA

Compile the Main Program:

• In the project’s root directory, use the provided Makefile to compile the main program:

make

Run the Main Program:

• After compiling, execute the main program to initialize the PTP master clock.

./main

Run ts2phc for Clock Synchronization:

• In a separate terminal window, run ts2phc with the following command to synchronize the PTP Hardware Clock (PHC) on /dev/ptp0:

ts2phc -c /dev/ptp0 -s generic --ts2phc.extts_correction -2500 --ts2phc.extts_polarity "rising" --ts2phc.pin_index 0 --leapfile /usr/share/zoneinfo/leap-seconds.list --ts2phc.channel 2 -l 7 -m

• This command sets the clock on /dev/ptp0 and applies a timestamp correction for accurate synchronization.

5. Monitoring Operation

Once the setup is complete, use ts2phc output to monitor the PTP clock’s performance.

Output

The following output format from ts2phc illustrates key details of the synchronization status:

ts2phc[80403.557]: adding tstamp 1727879618.999999999 to clock /dev/ptp0
ts2phc[80403.557]: /dev/ptp0 offset         -1 s2 freq  +45529
ts2phc[80404.557]: adding tstamp 1727879619.999999997 to clock /dev/ptp0
ts2phc[80404.557]: /dev/ptp0 offset         -3 s2 freq  +45527

The output format from main program illustrates the D/A values, raw timestamp value

Averge counts: 10000000.5
PID out value(D/A): 2460

Acknowledgements

A big thank to Professor Kovácsházy Tamás of the Budapest University of Technology and Economics for his invaluable support and guidance throughout these projects.