(Image credit: Cambricon)

Cambricon Technologies is preparing one of the most aggressive production ramp-ups attempted by a Chinese AI chipmaker. According to figures reported by Bloomberg, the company aims to deliver around 500,000 AI accelerators in 2026, including as many as 300,000 units of its Siyuan 590 and 690 processors.

These numbers, which would more than triple Cambricon’s 2025 output, come at a time when Chinese companies are reworking their hardware roadmaps in response to U.S. export controls and general geopolitical uncertainty. It also brings the limits of China’s current semiconductor manufacturing capabilities to the surface, which will play as large a role in market demand in determining what Cambricon can successfully ship.

The Siyuan line has become the company’s flagship portfolio for training and inference. Cambricon already counts ByteDance as its largest customer and is expected to expand engagements with Alibaba as these firms scale their domestic AI clusters.

Foundry constraints

(Image credit: Intel)

Having ambition is all well and good, but keep in mind that Cambricon doesn’t manufacture its own silicon. It depends on SMIC’s N+2 (7nm) processes for the Siyuan 590 and 690, the company’s most advanced production line that’s built entirely around DUV lithography rather than the EUV systems used by TSMC and Samsung. While N+2 can produce some pretty complex chips, it does so with a significant overhead in multi-patterning tests that raise cost and constrain performance.

This becomes apparent when you look at the numbers; *Bloomberg *reported yield rates of roughly 20% for Cambricon’s largest dies. That translates to four out of five chips coming off the wafer not meeting the targeted criteria, such as the chip having a defect or not meeting frequency or voltage targets (among other criteria). While some of those die could potentially be harvested for lower-power or lesser products, this yield level falls below most industry benchmarks. For instance, TSMC’s 2nm process has shown yields beyond 60% in test runs. Cambricon is therefore attempting to scale volume on a node that is both older and materially less efficient, so even if SMIC allocates more capacity, the proportion of chips that survive the manufacturing process will define the effective output.

Competition for those wafers adds another layer. Huawei, whose Ascend accelerators now form the backbone of many in-country training clusters, also relies on SMIC for advanced production. Demand for smartphone SoCs built on the same family of nodes has risen since Huawei’s return to 5G handsets. Any increase in Cambricon’s allocation requires SMIC to rebalance commitments across several strategically important customers, so the half-million-unit target for 2026 hints at strong confidence inside Cambricon that it can secure those slots. Ultimately, the foundry’s capacity and yields will determine what any ramp-up looks like in practice.

Memory supply is another challenge

(Image credit: SK hynix)

Even if Cambricon clears the manufacturing hurdle, system integration presents its own bottleneck because AI accelerators require large pools of HBM to keep their compute units saturated. HBM3 and HBM3E are dominated by South Korean suppliers, and despite heavy investment, China has yet to produce a competitive domestic alternative. Huawei’s Ascend 910C, for example, still uses HBM stacks from SK Hynix and Samsung.

This is important because memory availability can limit the number of accelerators that can be deployed. Chinese cloud operators may secure sufficient chip volume but still face delays if they cannot pair those dies with matching HBM modules. With global demand rising across hyperscale data centers — which has arguably led to Micron disbanding its consumer business — neither capacity nor long-term supply for HBM is certain. Cambricon’s customers will need to lock in memory procurement early. Without that, it’s entirely possible that some fraction of the company’s planned 2026 output could sit idle until the right modules arrive.

Then there’s packaging. Multi-chiplet integration and high-speed interconnect routing all depend on advanced packaging lines. China’s capabilities have grown, but CoWoS-class technologies used by Nvidia, AMD, and TSMC remain out of reach for China. Cambricon must rely on what is available domestically, which dictates choices around chip partitioning and memory placement and influences both performance and scalability of the final accelerator boards.

A domestic ecosystem takes shape

Changing procurement patterns among Chinese tech giants are as consequential as the silicon itself. ByteDance already accounts for more than half of Cambricon’s orders, and Alibaba is expected to follow as its cloud arm builds out new AI capacity. This transition is already evident in Cambricon’s finances, with the company reporting a fourteen-fold increase in revenue in the September quarter and returningto profitability after several loss-making years.

Meanwhile, Huawei’s Ascend line continues to scale, and Hygon, MetaX, and Moore Threads are each pursuing different slices of the AI compute market. Still, Cambricon’s roadmap and its position inside China’s largest internet companies give it a measure of influence over how rapidly China’s home-grown ecosystem matures. If the Siyuan 690 achieves its planned performance targets and SMIC can nudge yields upward, Cambricon could offer a credible alternative to older Nvidia architectures for a growing set of workloads inside China.

None of this collapses the stark performance gap between China and the global high-end. Nvidia’s leading chips remain far ahead on raw throughput, memory bandwidth, and software tooling. However, that gap is weighted against availability and compliance for Chinese buyers who are facing pressure to avoid Nvidia silicon and the uncertainty around future supply. Cambricon’s 2026 goals reflect that, highlighting a strong demand from a captive market and an equally strong dependence on domestic manufacturing.

If Cambricon succeeds in approaching its goal of 500,000 units, it’ll prove that SMIC’s N+2 process can sustain far larger volumes of AI silicon than we currently think it can. If it falls short due to yield, however, it’ll put the structural limits of China’s domestic production on show for all to see as the country pushes hard for autonomy in advanced silicon. Either outcome will offer more clarity into where the country stands in building a full-stack AI chip pipeline.

FollowTom’s Hardware on Google News, oradd us as a preferred source, to get our latest news, analysis, & reviews in your feeds.

Luke James is a freelance writer and journalist. Although his background is in legal, he has a personal interest in all things tech, especially hardware and microelectronics, and anything regulatory.