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💻 CPU Architecture
Instruction Sets, Pipelining, Cache, Microarchitecture
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117368
posts in
2.70
s
Apple’s
M5
strategy points to
unified
chip design
igorslab.de
·
2d
⚡
RISC-V
CUDA
Guide:
Workflow
for Performance Tuning
digitalocean.com
·
6d
🎮
SIMT Execution
Proving Immediate Mode
GUIs
are
Performant
forrestthewoods.com
·
3d
📊
Performance Tools
System
Specs
• Re: Retro
Rig
Photo Thread
vogons.org
·
2d
🖥️
Emulation
New comment by
spockz
in "Why E
cores
make Apple silicon fast"
news.ycombinator.com
·
2d
·
Discuss:
Hacker News
🖥️
Emulation
Concurrent
vs.
Parallel
Execution in LLM API Calls: From an AI Engineer’s Perspective
pub.towardsai.net
·
1d
⏰
Timely Dataflow
GEEKOM
A9
Max Review: Mini PC with AMD Ryzen AI 9 HX 370
liliputing.com
·
2d
💽
NVMe
Hello Edge: Keyword
Spotting
on
Microcontrollers
paperium.net
·
4d
·
Discuss:
DEV
📱
Edge AI
FPC
and
Lazarus
coding style
forum.lazarus.freepascal.org
·
2d
📦
Folly
The
Intelligibility
Advantage in an Era of
Infinite
Code
dev.to
·
2d
·
Discuss:
DEV
🔨
Incremental Compilation
Profiling
Go programs with
pprof
jvns.ca
·
3d
📊
Profiling Tools
Experimental
Analysis of Server-Side
Caching
for Web Performance
arxiv.org
·
1d
💾
Cache Design
How Netflix,
Uber
, and Google Build AI Systems: Architecture Deep
Dive
dev.to
·
1d
·
Discuss:
DEV
💬
Prompt Engineering
Design
TradeWars
game server
architecture
claude.ai
·
2d
🏗️
Systems Design
D-Legion: A Scalable Many-Core Architecture for Accelerating Matrix
Multiplication
in
Quantized
LLMs
arxiv.org
·
1d
🧮
Intel MKL-DNN
Blog: I
Benchmarked
Popular
MLX
Models That Fit on iPhone and iPad — Here's How Fast On-Device LLMs Actually Are
rickytakkar.com
·
2d
·
Discuss:
Hacker News
🚀
Performance
What should I program?
jamesmcm.github.io
·
2d
🦀
Rust
Processes and Threads -
Discourse
on
Concurrency
, Part I
ayanmali.substack.com
·
4d
·
Discuss:
Substack
🔄
Concurrency
SMTLIB
as a
Compiler
IR I
philipzucker.com
·
2d
·
Discuss:
Hacker News
🔧
LLVM IR Optimization
Bun
v1.3.9
news.ycombinator.com
·
1d
·
Discuss:
Hacker News
🥖
Bun
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