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SHADOW: Simultaneous Multi-Threading Architecture with Asymmetric Threads
danglingpointers.substack.com·1d·
Discuss: Substack
🧵Lightweight Threads
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SplittingSecrets: A Compiler-Based Defense for Preventing Data Memory-Dependent Prefetcher Side-Channels
arxiv.org·1d
🚀Software Prefetching
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Field Notes on Scaling MoE Expert Parallelism with DeepEP
nousresearch.com·1d·
🚀Intel ISPC
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Lock Management Inside a Process: Why Native Locks Alone Are Not Enough
dev.to·13h·
Discuss: DEV
🔒Futex
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Clockworker: single-threaded async executor with powerful scheduling to sit on top of async runtimes
github.com·2d·
Discuss: r/rust
Tokio Runtime
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Exploring Performance-Productivity Trade-offs in AMT Runtimes: A Task Bench Study of Itoyori, ItoyoriFBC, HPX, and MPI
arxiv.org·3h
🔄Glommio vs Tokio
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There's a secret computer inside your computer
xda-developers.com·11h
🔐Hardware Security
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A Novel Side-channel Attack That Utilizes Memory Re-orderings (U. of Washington, Duke, UCSC et al.)
semiengineering.com·14h
🔄Hardware Transactional Memory
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Streamlining CUB with a Single-Call API
developer.nvidia.com·11h
🧩mimalloc
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How Pinterest Built An Async Compute Platform for Billions of Task Executions
blog.bytebytego.com·1d
Timely Dataflow
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Phase-space engineering and collective dynamics in memcomputing
link.aps.org·1h
🎴SIMD Shuffles
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Extensible Scheduler Class — The Linux Kernel documentation
docs.kernel.org·2d
📅Linux Scheduling
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Should enterprises run containers in VMs or bare metal?
thenewstack.io·13h
☸️Kubernetes
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Curbing Soaring Power Demand Through Foundation IP
semiwiki.com·18h
Hardware Acceleration
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Adjusting One Line Of Linux Code Yields 5x Wakeup Latency Reduction For Modern Xeon CPUs
phoronix.com·21h
🛡️Intel CET
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FastMCP 3.0: From Tool Servers to Context Applications
mcpstatus.io·1d·
Discuss: Hacker News
🔌gRPC Interceptors
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Real-Time Data Stream Processing in Go: Backpressure, Windowing, and Fault Tolerance Explained
dev.to·19h·
Discuss: DEV
Timely Dataflow
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Scientific Computing in Rust Monthly #14
scientificcomputing.rs·20h
🦀Rust Macros
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FlashAttention 4: Faster, Memory-Efficient Attention for LLMs
digitalocean.com·20h
🔄Hardware Transactional Memory
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**Abstract:** This research proposes a novel approach to dynamic resource allocation within CUDA Streaming Multiprocessors (SMs) to enhance performance and e...
freederia.com·2d
🧩mimalloc
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