Dive into Systems
diveintosystems.org·1d·
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🔨Compiler Design
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Low-Level Hacks
blog.raycursive.com·17h·
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#️⃣Hash Tables
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Disciplined Biconvex Programming
arxiv.org·15h
📊Dynamic Programming
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On Designing Low-Latency Systems for High-Traffic Environments
hackernoon.com·1d
⚖️Load Balancing
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Microservices? No, modularity is what matters
binaryigor.com·7h·
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🎯Microservices
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How to Design Efficient Memory Architectures for Agentic AI Systems
pub.towardsai.net·1h
🔁Cache Coherence
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Beginner’s Guide to .NET Development
dev.to·8h·
Discuss: DEV
🔨Compiler Design
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Showcase: In Memoria - Rust core with TypeScript/NAPI interface for high-performance AI tooling
reddit.com·4h·
Discuss: r/rust
🕸️WebAssembly
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Moving past speculation: How deterministic CPUs deliver predictable AI performance
venturebeat.com·2d
🔁Cache Coherence
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Free Functions Don't Change Performance (Much)
16bpp.net·1d·
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🦀Rust Macros
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The Learning Loop and LLMs
martinfowler.com·5h·
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🦀Rust Macros
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Playing Around with ARM Assembly
blog.nobaralabs.com·16h·
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🦀Rust Macros
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Computer Science Fundamentals: From Binary Systems to Algorithms
dev.to·3h·
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🌳Data Structures
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A Friendly Tour of Process Memory on Linux
0xkato.xyz·21h·
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📋Zero-Copy
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My C++ lockless-ish task scheduler project ive been working on (first real project, also first time using threads) tell me what you think (BSD license) currentl...
github.com·2d·
Discuss: r/compsci, r/programming
⚡Async Programming
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4 BIOS settings I always enable on my home lab devices
xda-developers.com·1h
🛡️RAII
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Cons Should Not Cons Its Arguments, Part II: Cheney on the MTA
web.archive.org·1d·
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🔨Compiler Design
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Cutting LLM Batch Inference Time in Half: Dynamic Prefix Bucketing at Scale
daft.ai·2h·
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🔁Cache Coherence
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Think DSP second edition
allendowney.com·3h
🦀Rust Macros
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Essential Things to Know Before Upgrading Your Computer Memory
buysellram.com·1d·
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🛡️Memory Safety
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