The Korean Institute Of Semiconductor Engineers has published a long-term assessment of the development of semiconductor technology in its Semiconductor Technology Roadmap 2026. The report predicts that integrated circuits with structure sizes of 0.2 nanometres could be realized within the next 15 years. This would take the industry into the so-called Angstrom range. This estimate is based on the fact that series production of 2-nanometer technologies is still in its infancy and there are numerous technological hurdles on the way to sub-1-nanometer structures.

According to the accompanying report, the roadmap is intended as a strategic instrument for strengthening long-term technological competitiveness, promoting academic research and developing skilled workers in the semiconductor sector. It addresses nine core areas, including semiconductor devices and manufacturing processes, AI accelerators, optical and wireless compound semiconductors, sensor technology, packaging technologies, PIM architectures and quantum computing.

Advances in logic and memory technologies

The currently smallest commercially announced production node is based on the 2-nanometer gate all-around technology developed by Samsung. According to industry sources, the company is already working on advanced versions of this technology. These include a second generation of the 2-nanometer GAA node and a third expansion stage, which is to be introduced under the name SF2P within the next few years.

For the year 2040, the roadmap assumes that a 0.2-nanometer process will use new transistor architectures such as CFET and a monolithic 3D design. This combination should overcome the physical limits of classic planar-scaled structures and enable further miniaturization.

At the same time, significant progress is expected in memory technologies. A reduction in structure sizes from the current 11 nanometers to around 6 nanometers is forecast for DRAM. In the area of high bandwidth memory, an increase from the current 12 layers and around 2 terabytes per second of bandwidth to up to 30 layers and significantly higher transfer rates is expected. For NAND flash memory, forecasts predict an increase from the current 321 layers, as demonstrated by SK hynix and others, to up to 2,000 layers in the long term.

Outlook for AI accelerators and computing power

Another focus of the roadmap is on the development of AI semiconductors. While today’s accelerators operate at tens of trillions of operations per second, the report expects chips with around 1,000 TOPS for training and around 100 TOPS for inference within 15 years. These figures represent target values whose practical realization depends on advances in architecture, energy efficiency and manufacturing technologies. Independent verification of these performance figures is currently not possible.

Conclusion

The forecasts of the Korean Institute Of Semiconductor Engineers paint a long-term picture of a strongly developed semiconductor industry in which structure sizes in the Angstrom range, monolithic 3D integration and new transistor architectures are expected to play a central role. At the same time, the report makes it clear that the path to this goal is characterized by considerable technological challenges and requires several intermediate steps in logic, memory and packaging technologies.