Memory Alignment and Layout
garden.christophertee.dev·1w
🌐WebAssembly
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Best CPU/RAM Combo for AI: EPYC (8-Channel DDR4) vs. Ryzen (Dual-Channel DDR5) with Blackwell PRO 6000 Max Q
reddit.com·3w·
Discuss: r/LocalLLaMA
⚡SIMD
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Building Up And Sanding Down
endler.dev·6d
🌐WebAssembly
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NextSilicon Takes Aim At CPUs And GPUs With “Maverick-2” Dataflow Engine
nextplatform.com·2w·
Discuss: r/hardware
⚡SIMD
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A High-Level overview of Address Spaces: Their Place in ClangIR
dev.to·1w·
Discuss: DEV
⚙️Compilers
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Free Functions Don't Change Performance (Much)
16bpp.net·3d·
Discuss: Hacker News, r/cpp
⚙️Compilers
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Understanding Type-Based Alias Analysis in C and C++
kdab.com·1w·
Discuss: Hacker News
⚙️Compilers
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Making asm.js/WebAssembly compilation more parallel in Firefox
bouvier.cc·1w
🌐WebAssembly
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"Why Learn C" Book Released
link.springer.com·3w·
Discuss: DEV
⚙️Compilers
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Chiplets: Powering the Next Generation of AI Systems
semiwiki.com·1w
⚡SIMD
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A Systems Engineer’s Guide to Benchmarking with RDTSC
blog.codingconfessions.com·2w·
Discuss: Hacker News
⚙️Compilers
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Chiplet Chokepoints: Optimizing Interconnects for Peak AI Performance
dev.to·1w·
Discuss: DEV
⚡SIMD
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Announcing coreboot 25.09 release
blogs.coreboot.org·3w
⚙️Compilers
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Unlock AI's Speed Potential: Bitwidth-Aware Logarithmic Arithmetic by Arvind Sundararajan
dev.to·2w·
Discuss: DEV
🔢Number Theory
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Learning Triton One Kernel at a Time: Matrix Multiplication
towardsdatascience.com·3w
⚡SIMD
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ML Workload Runs 30x Faster w AVX-512
parallelprogrammer.substack.com·2w·
Discuss: Substack
⚡SIMD
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Performance Issues in Web Services: A Practical Guide to Identification and Resolution
dev.to·6d·
Discuss: DEV
🌐WebAssembly
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Statistical Model Checking As An Evaluation Tool of Microarchitectural Side Channels (Duke, Harvard, Univ. of Florida)
semiengineering.com·2w
⚡SIMD
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Looking for good books on ARM assembly and bare metal embedded
reddit.com·3w·
Discuss: r/embedded
🌐WebAssembly
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Fil-C: A memory-safe C implementation
lwn.net·1w·
Discuss: Hacker News
⚙️Compilers
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