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Computer Architecture
🧠 Computer Architecture
CPU, memory hierarchy, SIMD, hardware design, processor
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RISC-V
And GPU Synergy In Practice: A Path Towards High-Performance SoCs
⚡
RISC-V
semiengineering.com
·
6d
6 days ago
Actions for RISC-V And GPU Synergy In Practice: A Path Towards High-Performance SoCs
RISC-V
CPU
Performance Up 8x In Five Years: SiFive HiFive Unmatched To SpacemiT K3
⚡
RISC-V
phoronix.com
·
1d
1 day ago
Actions for RISC-V CPU Performance Up 8x In Five Years: SiFive HiFive Unmatched To SpacemiT K3
(
PR
) NextSilicon to Productize Arbel
RISC-V
Core Into 64-Core Enterprise Processor for AI and HPC
⚡
RISC-V
techpowerup.com
·
13h
13 hours ago
Actions for (PR) NextSilicon to Productize Arbel RISC-V Core Into 64-Core Enterprise Processor for AI and HPC
vpod:
RISC-V
Linux sandboxes running in WebAssembly for untrusted
processes
⚡
RISC-V
Content type:
Code
github.com
·
5h
5 hours ago
·
r/rust
Actions for vpod: RISC-V Linux sandboxes running in WebAssembly for untrusted processes
RISC-V
Summit Europe 2026: Industry and Academia Unite in Bologna to Advance Open
Hardware
⚡
RISC-V
Content type:
News
eetimes.com
·
2d
2 days ago
Actions for RISC-V Summit Europe 2026: Industry and Academia Unite in Bologna to Advance Open Hardware
SpacemiT shows off usably quick
RISC-V
mini desktop
⚡
RISC-V
Content type:
News
theregister.com
·
17h
17 hours ago
·
r/hardware
Actions for SpacemiT shows off usably quick RISC-V mini desktop
Why my
SIMD
code was silently running as scalar, and what debugging it taught me about production environment assumptions
🦀
Rust
Content type:
Blog
coloneltoad.substack.com
·
6d
6 days ago
·
Substack
Actions for Why my SIMD code was silently running as scalar, and what debugging it taught me about production environment assumptions
Apple Chip
Architecture
from 1977 to 2026
🔌
Embedded Systems
Content type:
News
Content type:
Blog
blog.jacobstechtavern.com
·
1d
1 day ago
Actions for Apple Chip Architecture from 1977 to 2026
Fedora 44
RISC-V
Images Released, Including New "Omni" Kernel For Broader
RISC-V
Hardware
Support
⚡
RISC-V
lemmy.ml
·
11h
11 hours ago
Actions for Fedora 44 RISC-V Images Released, Including New "Omni" Kernel For Broader RISC-V Hardware Support
The Tick-Tock AI Development Cycle.
🖥️
Systems Programming
wilsoniumite.com
·
11h
11 hours ago
Actions for The Tick-Tock AI Development Cycle.
Vortex expands open
RISC-V
graphics
⚡
RISC-V
jonpeddie.com
·
5h
5 hours ago
Actions for Vortex expands open RISC-V graphics
"
RISC-V
Is Now"
⚡
RISC-V
Content type:
Video
youtube.com
·
1d
1 day ago
·
Hacker News
Actions for "RISC-V Is Now"
Elasticsearch
simdvec
deep-dive: Walking the
memory
tightrope to 2x better vector throughput
🔄
Data-Intensive Apps
Content type:
Blog
elastic.co
·
5d
5 days ago
Actions for Elasticsearch simdvec deep-dive: Walking the memory tightrope to 2x better vector throughput
Who is the fastest?
📈
Performance Engineering
ziggit.dev
·
5h
5 hours ago
Actions for Who is the fastest?
Graviton5’s improved
design
increases speed and energy efficiency — beyond Moore’s law
☁️
Cloud Infrastructure
Content type:
Blog
amazon.science
·
11h
11 hours ago
·
Hacker News
Actions for Graviton5’s improved design increases speed and energy efficiency — beyond Moore’s law
RISC-V
edge box packs dual GbE, CAN, and 4G/5G support
⚡
RISC-V
linuxgizmos.com
·
2d
2 days ago
Actions for RISC-V edge box packs dual GbE, CAN, and 4G/5G support
ESP32-S31
🔌
Embedded Systems
Content type:
Discussion
news.ycombinator.com
·
6d
6 days ago
·
Hacker News
Actions for ESP32-S31
SPARX: Secure and Privacy-Aware Approximate CNN Acceleration with Edge
RISC-V
SoC
⚡
RISC-V
Content type:
Academic
arxiv.org
·
22h
22 hours ago
Actions for SPARX: Secure and Privacy-Aware Approximate CNN Acceleration with Edge RISC-V SoC
The Return of Rigorous Full-System Timing
Simulation
🌐
Networking Internals
sigarch.org
·
2d
2 days ago
·
Hacker News
Actions for The Return of Rigorous Full-System Timing Simulation
OpenCV 5 release - New DNN engine with enhanced ONNX and LLM/VLM support, Intel, Arm, and
RISC-V
hardware
optimizations - CNX Software
⚡
RISC-V
Content type:
News
cnx-software.com
·
23h
23 hours ago
Actions for OpenCV 5 release - New DNN engine with enhanced ONNX and LLM/VLM support, Intel, Arm, and RISC-V hardware optimizations - CNX Software
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