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CPU Architecture
💾 CPU Architecture
processor design, microarchitecture, silicon, instruction set, x86
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RISC-V
Targets Data Centers, Edge AI, Space
🔌
Hardware
Content type:
News
eetimes.com
·
16h
16 hours ago
Actions for RISC-V Targets Data Centers, Edge AI, Space
Intel 8086, the First
x86
chip, Enters its 50th Year in 2027
🖥️
Retro Computing
techpowerup.com
·
2d
2 days ago
Actions for Intel 8086, the First x86 chip, Enters its 50th Year in 2027
Fedora 44
RISC-V
Images Released, Including New "Omni" Kernel For Broader
RISC-V
Hardware Support
🪟
Windows Internals
phoronix.com
·
3d
3 days ago
Actions for Fedora 44 RISC-V Images Released, Including New "Omni" Kernel For Broader RISC-V Hardware Support
Linux 7.2 To Enable ESWIN SoC Support By Default For
RISC-V
Kernel Builds
⚙️
Systems Programming
lxer.com
·
23h
23 hours ago
Actions for Linux 7.2 To Enable ESWIN SoC Support By Default For RISC-V Kernel Builds
NextSilicon to Productize Arbel
RISC-V
Core into 64-Core Enterprise
Processor
for AI and HPC
✍️
Tech Writing
hpcwire.com
·
1d
1 day ago
·
r/hardware
Actions for NextSilicon to Productize Arbel RISC-V Core into 64-Core Enterprise Processor for AI and HPC
Best Fixed Cash
ISA
Rates UK 2026: Should You Even Fix?
🦀
Rust
Content type:
Discussion
freedomisntfree.co.uk
·
3d
3 days ago
Actions for Best Fixed Cash ISA Rates UK 2026: Should You Even Fix?
Why Your
CPU
Is Fast but Your Program Is Slow: Understanding the Memory Wall
⚙️
Systems Programming
Content type:
Blog
prawns.dev
·
14h
14 hours ago
·
Hacker News
Actions for Why Your CPU Is Fast but Your Program Is Slow: Understanding the Memory Wall
"
RISC-V
Is Now"
⚙️
Systems Programming
Content type:
Video
youtube.com
·
2d
2 days ago
·
Hacker News
Actions for "RISC-V Is Now"
coherentforge/CambiOS: Zero-trust, capability-based Rust microkernel targeting formal verification.
Tri-arch
(
x86
_64 / AArch64 /
RISC-V
). Sovereign and generative: no telemetry, user owns keys and data. Early-stage — see STATUS.md. Inspired by seL4, Hubris, and Redox.
⚙️
Systems Programming
Content type:
Code
github.com
·
14h
14 hours ago
·
Hacker News
Actions for coherentforge/CambiOS: Zero-trust, capability-based Rust microkernel targeting formal verification. Tri-arch (x86_64 / AArch64 / RISC-V). Sovereign and generative: no telemetry, user owns keys and data. Early-stage — see STATUS.md. Inspired by seL4, Hubris, and Redox.
SpacemiT shows off usably quick
RISC-V
mini desktop
🔌
Hardware
Content type:
News
theregister.com
·
1d
1 day ago
·
r/hardware
Actions for SpacemiT shows off usably quick RISC-V mini desktop
How to Comply with New EU Speed Limit Rules
🔌
Hardware
Content type:
Blog
mapbox.com
·
3d
3 days ago
Actions for How to Comply with New EU Speed Limit Rules
AMD Claims 256-Core Zen 6 EPYC
CPU
Smokes NVIDIA Vera In AI Servers
🧐
AI Criticism
Content type:
News
hothardware.com
·
10h
10 hours ago
Actions for AMD Claims 256-Core Zen 6 EPYC CPU Smokes NVIDIA Vera In AI Servers
The Tick-Tock AI Development Cycle.
⚙️
Systems Programming
wilsoniumite.com
·
1d
1 day ago
Actions for The Tick-Tock AI Development Cycle.
Openchip taps Baya Systems data-movement platform for
RISC-V
systems
🔌
Hardware
siliconangle.com
·
19h
19 hours ago
Actions for Openchip taps Baya Systems data-movement platform for RISC-V systems
RISC-V
edge box packs dual GbE, CAN, and 4G/5G support
🔌
Hardware
linuxgizmos.com
·
4d
4 days ago
Actions for RISC-V edge box packs dual GbE, CAN, and 4G/5G support
uiCA: Accurate Throughput
Prediction
of Basic Blocks on Recent Intel
Microarchitectures
⚙️
Systems Programming
Content type:
Academic
arxiv.org
·
2d
2 days ago
·
Hacker News
Actions for uiCA: Accurate Throughput Prediction of Basic Blocks on Recent Intel Microarchitectures
Canonical Launches
ARM
Laptop Certification Program to Boost Ubuntu’s Next Generation of Mobile Computing
⚙️
Systems Programming
linuxjournal.com
·
13h
13 hours ago
Actions for Canonical Launches ARM Laptop Certification Program to Boost Ubuntu’s Next Generation of Mobile Computing
Apple Chip
Architecture
from 1977 to 2026
🍎
Apple
Content type:
News
Content type:
Blog
blog.jacobstechtavern.com
·
2d
2 days ago
Actions for Apple Chip Architecture from 1977 to 2026
Why
x86
Zeroes a Register With `xor eax, eax`
🔍
Reverse Engineering
Content type:
Blog
debasishg.github.io
·
4d
4 days ago
Actions for Why x86 Zeroes a Register With `xor eax, eax`
MacOS 27 won’t run on Intel hardware, MacOS 28 will end support for
x86
apps on Apple
Silicon
🍎
Apple
liliputing.com
·
9h
9 hours ago
Actions for MacOS 27 won’t run on Intel hardware, MacOS 28 will end support for x86 apps on Apple Silicon
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