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🔧 Custom CPUs
CPU design, custom processor, HDL, homebrew CPU, microarchitecture
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144856
posts in
20.4
ms
3D-Stacked
NMP
, LLM Decoding, Systolic Array
Microarchitecture
, Multi-Core Scheduling
⚙️
ISA Design
arxiv.org
·
1d
Ask HN: Why isn't FPGA adoption
exploding
now that LLMs can write
HDL
?
📐
Systems Design
news.ycombinator.com
·
3d
·
Hacker News
Little-used
cholesterol
test could prevent more heart attacks and
strokes
🧠
Deep Work
medicalxpress.com
·
5h
A
32-Bit
386 PC on a
Breadboard
⚙️
Low-Level Programming
hackster.io
·
23h
Super
Hi
International Holding Ltd. 2025 Q4 - Results - Earnings Call Presentation (NASDAQ:
HDL
) 2026-04-03
🧠
Mindset
seekingalpha.com
·
4d
Optimising a
Pipelined
RISC-V Core: From Naive Pipeline to
Near-Superscalar
Performance
⚙️
ISA Design
mummanajagadeesh.github.io
·
1d
·
Lobsters
,
Hacker News
From
SoC
to System-in-Package: Transforming Automotive
Compute
with Multi-Die Integration
⚙️
ISA Design
semiwiki.com
·
5h
PiTorch
: ML on
Baremetal
Raspberry Pis
🖥️
Bytecode VMs
masonjwang.com
·
2h
·
Hacker News
14sea/Cyclone
_
CRAM
_Mapper: A physical-aware routing codec for Intel Cyclone IV FPGAs.
⚙️
ISA Design
github.com
·
2d
·
Hacker News
Guardrailing
Claude Code to Build Production-Ready MCP
Servers
🏗️
AI Infrastructure
medium.com
·
8h
Powerful
Multicompute
🛡️
CHERI
volatco.github.io
·
53m
·
Hacker News
How Much
Linear
Memory Access Is
Enough
?
⚙️
Low-Level Programming
solidean.com
·
9h
·
Hacker News
Modder uses Claude AI to code new BIOS that gets obscure all P-core Intel
Bartlett
Lake CPUs running on a
Z790
motherboard
🛡️
CHERI
pcgamer.com
·
1d
bunnie
's blog
🛡️
CHERI
bunniestudios.com
·
6d
Show HN:
Benchmark
multiple LLMs to
compare
quality, speed, and cost
🖧
Hypervisors
loopthink.ai
·
4h
·
Hacker News
I
benchmarked
GPT-4o
, Claude 3.5, and Gemini 1.5 for security
🪝
eBPF
aibench.trypromptguard.com
·
21h
·
DEV
Linear Time Complexity in
Fano
Driven
E8
Reductions
🌐
Distributed Systems
zenodo.org
·
2d
·
Hacker News
Arch: An AI-Native Hardware
Description
Language for Register-Transfer
Clocked
Hardware Design
⚙️
ISA Design
arxiv.org
·
18h
Untangling
Tokio and
Rayon
in production: From 2s latency spikes to 94ms flat
🪝
eBPF
posthog.com
·
22h
·
Lobsters
Portability
and the Road Ahead
📐
Systems Design
modular.com
·
5d
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