🔧 Custom CPUs - ndjenks · Scour

I designed a nibble-oriented CPU in Verilog to build a scientific calculator 🔍Reverse Engineering

github.com·5d·Hacker News

SDR ProTrack RTL-SDR Radio Direction Finding Android App Updated 📡Protocol Design

rtl-sdr.com·2d

Entropy, relayed from real RTL-SDR hardware 📡Protocol Design

sdrrand.nuts.services·11h·Hacker News

Designing an FPGA calculator from scratch ⚙️ISA Design

blog.adafruit.com·1d

Options Grow For Standardizing Data Movement And Sharing Resources 📐Systems Design

semiengineering.com·21h

Designing a Scientific Calculator from scratch in FPGA ⚙️ISA Design

baltazarstudios.com·4d·Lobsters, Hacker News

Spiker-LL: An Energy-Efficient FPGA Accelerator Enabling Adaptive Local Learning in Spiking Neural Networks 🎮GPU Microarchitecture

FMA Instruction Set ⚙️ISA Design

en.wikipedia.org·11h·Hacker News

RISC-V Summit Europe 2026 🛡️CHERI

riscv-europe.org·5d·r/linux

METEOR-M (METEOR-M N2-3, METEOR-M N2-4) satellites reception 🖧Hypervisors

a-centauri.com·1h

DIABLO (ディアブロ) (PROTOTYPE) SGB Enhanced (Game Boy) Romhack 🎮NES Internals

romhackplaza.org·9h

Researchers break the 'memory wall' in large-scale AI training 🏗️AI Infrastructure

techxplore.com·2d

Design Verification at 3nm: What's Actually Hard and How Teams Are Solving It 📐Systems Design

siliconpatterns.com·5d·DEV

NASA builds space-grade AI compute 🛡️CHERI

jonpeddie.com·7h

English-Arabic App Development: RTL, Cost & MENA Guide 📐Systems Design

digixvalley.com·2d

LifeSafer and O'Neill's Driving School Partner to Enable Safer Driving for Teens 🪝eBPF

einpresswire.com·16h

DIY open-source ultrasound hardware on the rp2040/rp2350 🔴ROCm

un0rick.cc·6d·Hacker News

Architecture & Systems are Changing: The Architect’s Role in the Era of Agentic Co-Design 📐Systems Design

sigarch.org·1d·Hacker News

aionhw/xezim: SystemVerilog (IEEE 1800-2017) Simulator ⚡Dynamic Recompilation

github.com·23h·Hacker News

EPIC: Abstraction and Polymorphism of In-Network Collectives on Ethernet 🌐Distributed Systems

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