AMD Turin PSP binaries analysis from open-source firmware perspective
blog.3mdeb.com·4h·
Discuss: Hacker News
Risc-v
Automated DSL Optimization for Spiking Neural Network Hardware Synthesis
dev.to·20h·
Discuss: DEV
🧠Neuromorphic Chips
The Demise Of Static Timing Verification?
semiengineering.com·3d
🧩RISC-V
Test state, not interactions
rednafi.com·1d·
Discuss: Hacker News
☁️Serverless Rust
Trigger crossbar
serd.es·8h·
Discuss: Hacker News
🔌Microcontrollers
Writing an operating system kernel from scratch
popovicu.com·1d·
Risc-v
Cognitive and Gestalt psychology in your code: SMVP pattern
github.com·2h·
Discuss: Hacker News
🧩Low-code
This free tool might finally tell you why your PC is suddenly slowing down
xda-developers.com·2h
🔬eBPF Monitoring
I built an LLM from Scratch in Rust (Just ndarray and rand)
reddit.com·10h·
Discuss: r/rust
☁️Serverless Rust
J-Link RTT for the Masses using Semihosting on ARM
bogdanthegeek.github.io·2h·
Discuss: Hacker News
🔌Embedded Rust
Review: SpikingBrain Technical Spiking Brain-Inspired Large Models
arxiviq.substack.com·1d·
Discuss: Substack
🧠Neuromorphic Chips
Refurb weekend: Silicon Graphics Indigo² IMPACT 10000
oldvcr.blogspot.com·20h·
Risc-v
Fil's C Compiler
fil-c.org·1d·
Discuss: Hacker News
🔌Embedded Rust
EP180: Python vs Java
blog.bytebytego.com·1d
🌊Event Streaming
486Tang – 486 on a credit-card-sized FPGA board
nand2mario.github.io·1d·
Discuss: Hacker News
Hardware Acceleration
And by "garbage" I mean it. Linus
lore.kernel.org·1d·
Discuss: Hacker News
Risc-v
Beyond Traditional Pseudorandomness, Tsotchkes' Quantum Random Number Generation
medium.com·1d·
Discuss: Hacker News
☁️Serverless Rust
Eternal-Tux: Crafting a Linux Kernel KSMBD 0-Click RCE Exploit from N-Days
willsroot.io·18h·
🔍eBPF
GraalVM's LLVM Back End
praj.in·2d·
💻Local LLMs