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Hardware Acceleration
⚡ Hardware Acceleration
GPU Computing, FPGA, AI Chips, Custom Silicon
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Framework Desktop AMD 395+ (rdna 3.5) cannot run confyui err Fix 2026
🔥
PyTorch
Content type:
Blog
runaihome.com
·
2d
2 days ago
·
DEV
Actions for Framework Desktop AMD 395+ (rdna 3.5) cannot run confyui err Fix 2026
AMD's Lemonade SDK For Local
AI
Adds NVIDIA
CUDA
Support
🖥
computers
phoronix.com
·
1h
1 hour ago
Actions for AMD's Lemonade SDK For Local AI Adds NVIDIA CUDA Support
Founding Engineer -
FPGA
, RTL, &
ASIC
Architect at Zettascale
🔌
FPGA
ycombinator.com
·
6d
6 days ago
·
Hacker News
Actions for Founding Engineer - FPGA, RTL, & ASIC Architect at Zettascale
Towards Autonomous
Accelerator
Design:
FPGA
Accelerator
Generation with SECDA
🔌
FPGA
Content type:
Academic
arxiv.org
·
14h
14 hours ago
Actions for Towards Autonomous Accelerator Design: FPGA Accelerator Generation with SECDA
Exploiting
GPU
Tensor
Cores from Java using Babylon [Juan Fumero]
🔥
Burn
openjdk.org
·
1d
1 day ago
·
r/java
Actions for Exploiting GPU Tensor Cores from Java using Babylon [Juan Fumero]
Exploring the Classic Xilinx XC5202-6PQ100I
FPGA
🔌
FPGA
hackster.io
·
11h
11 hours ago
Actions for Exploring the Classic Xilinx XC5202-6PQ100I FPGA
KJLdefeated/RL.cu
: RLVR training for LLM in CUDA/C++
🔥
PyTorch
Content type:
Code
github.com
·
3d
3 days ago
·
Hacker News
Actions for KJLdefeated/RL.cu: RLVR training for LLM in CUDA/C++
Rethinking the Logic-Routing Tradeoff in
FPGAs
🔌
FPGA
Content type:
News
eetimes.com
·
1d
1 day ago
Actions for Rethinking the Logic-Routing Tradeoff in FPGAs
From
GPU
to Token: The 8-Layer Observability Stack for
AI
Infrastructure
🏗️
AI Infrastructure
Content type:
Blog
jimmysong.io
·
1d
1 day ago
Actions for From GPU to Token: The 8-Layer Observability Stack for AI Infrastructure
NVIDIA Nsight
Compute
🌟
Ray Tracing
developer.nvidia.com
·
6d
6 days ago
Actions for NVIDIA Nsight Compute
Asics
running shoes are up to 42% off — I’ve handpicked 7 deals on shoes I’ve tested and recommend
👔
Men's Fashion
tomsguide.com
·
2d
2 days ago
Actions for Asics running shoes are up to 42% off — I’ve handpicked 7 deals on shoes I’ve tested and recommend
Agilex 9
FPGAs
power COTS VPX boards
🔌
FPGA
edn.com
·
6d
6 days ago
Actions for Agilex 9 FPGAs power COTS VPX boards
Deep X XM2
NPU
: 80 TOPS Generative
AI
Accelerator
at 5W
📡
Edge Computing
armdevices.net
·
5d
5 days ago
Actions for Deep X XM2 NPU: 80 TOPS Generative AI Accelerator at 5W
Programming Domain-Specific
FPGA
Hardblocks from HLS: An RTL Blackbox Approach
🔌
FPGA
Content type:
Academic
arxiv.org
·
1d
1 day ago
Actions for Programming Domain-Specific FPGA Hardblocks from HLS: An RTL Blackbox Approach
CUDA-Oxide
0.2 Brings Early Improvements To Pure Rust
CUDA
Kernels
🏗️
AI Infrastructure
phoronix.com
·
5d
5 days ago
Actions for CUDA-Oxide 0.2 Brings Early Improvements To Pure Rust CUDA Kernels
Communication Strategy Selection for
Multi-GPU
3D FDTD with Convolutional Perfectly Matched Boundary Layers
🌟
Ray Tracing
Content type:
Academic
arxiv.org
·
2d
2 days ago
Actions for Communication Strategy Selection for Multi-GPU 3D FDTD with Convolutional Perfectly Matched Boundary Layers
AgentCompile: An LLM-Guided Compiler for Direct
CUDA
Inference
🔥
PyTorch
Content type:
Academic
arxiv.org
·
1d
1 day ago
Actions for AgentCompile: An LLM-Guided Compiler for Direct CUDA Inference
FlexNPU: Transparent
NPU
Virtualization for Dynamic LLM Prefill-Decode
Co-location
🤖
AI Inference
Content type:
Academic
arxiv.org
·
6d
6 days ago
Actions for FlexNPU: Transparent NPU Virtualization for Dynamic LLM Prefill-Decode Co-location
Modeling, Optimizing and Exploring Multi-Die
FPGA
Routing Architectures
🔌
FPGA
Content type:
Academic
arxiv.org
·
5d
5 days ago
Actions for Modeling, Optimizing and Exploring Multi-Die FPGA Routing Architectures
LLM-Based Porting of Optimized C++ to
CUDA
Through Deoptimization and Reoptimization
🏗️
AI Infrastructure
Content type:
Academic
arxiv.org
·
5d
5 days ago
Actions for LLM-Based Porting of Optimized C++ to CUDA Through Deoptimization and Reoptimization
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