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CPU Architecture
🧠 CPU Architecture
processor design, ISA, microarchitecture, pipelines
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RISC-V
Targets Data Centers, Edge AI, Space
💪
ARM
Content type:
News
eetimes.com
·
18h
18 hours ago
Actions for RISC-V Targets Data Centers, Edge AI, Space
Fedora 44
RISC-V
Images Released, Including New "Omni" Kernel For Broader
RISC-V
Hardware Support
🖥️
Systems Programming
phoronix.com
·
3d
3 days ago
Actions for Fedora 44 RISC-V Images Released, Including New "Omni" Kernel For Broader RISC-V Hardware Support
(
PR
) NextSilicon to Productize Arbel
RISC-V
Core Into 64-Core Enterprise Processor for AI and HPC
💪
ARM
techpowerup.com
·
1d
1 day ago
Actions for (PR) NextSilicon to Productize Arbel RISC-V Core Into 64-Core Enterprise Processor for AI and HPC
coherentforge/CambiOS: Zero-trust, capability-based Rust microkernel targeting formal verification.
Tri-arch
(
x86
_64 / AArch64 /
RISC-V
). Sovereign and generative: no telemetry, user owns keys and data. Early-stage — see STATUS.md. Inspired by seL4, Hubris, and Redox.
🖥️
Systems Programming
Content type:
Code
github.com
·
16h
16 hours ago
·
Hacker News
Actions for coherentforge/CambiOS: Zero-trust, capability-based Rust microkernel targeting formal verification. Tri-arch (x86_64 / AArch64 / RISC-V). Sovereign and generative: no telemetry, user owns keys and data. Early-stage — see STATUS.md. Inspired by seL4, Hubris, and Redox.
"
RISC-V
Is Now"
💪
ARM
Content type:
Video
youtube.com
·
2d
2 days ago
·
Hacker News
Actions for "RISC-V Is Now"
Quantum Logic Codes: Complete Transversal Logical Clifford
Instruction
Sets for High-Rate Stabilizer Quantum Error Correcting Codes
📦
LSM Trees
Content type:
Academic
arxiv.org
·
4h
4 hours ago
Actions for Quantum Logic Codes: Complete Transversal Logical Clifford Instruction Sets for High-Rate Stabilizer Quantum Error Correcting Codes
Best Fixed Cash
ISA
Rates UK 2026: Should You Even Fix?
📦
LSM Trees
Content type:
Discussion
freedomisntfree.co.uk
·
3d
3 days ago
Actions for Best Fixed Cash ISA Rates UK 2026: Should You Even Fix?
SRAM
brings more production to Europe with new Portugal facility
🐬
InnoDB
bicycleretailer.com
·
2d
2 days ago
Actions for SRAM brings more production to Europe with new Portugal facility
Openchip taps Baya Systems data-movement platform for
RISC-V
systems
💪
ARM
siliconangle.com
·
22h
22 hours ago
Actions for Openchip taps Baya Systems data-movement platform for RISC-V systems
Linux 7.2 To Enable ESWIN SoC Support By Default For
RISC-V
Kernel Builds
🖥️
Systems Programming
lxer.com
·
1d
1 day ago
Actions for Linux 7.2 To Enable ESWIN SoC Support By Default For RISC-V Kernel Builds
oss-sec: ITScape: Guest-to-Host Escape in
KVM/arm64
(CVE-2026-46316)
💪
ARM
seclists.org
·
12h
12 hours ago
·
Hacker News
Actions for oss-sec: ITScape: Guest-to-Host Escape in KVM/arm64 (CVE-2026-46316)
How to Comply with New EU Speed Limit Rules
🖥️
Systems Programming
Content type:
Blog
mapbox.com
·
3d
3 days ago
Actions for How to Comply with New EU Speed Limit Rules
SpacemiT shows off usably quick
RISC-V
mini desktop
💪
ARM
Content type:
News
theregister.com
·
1d
1 day ago
·
r/hardware
Actions for SpacemiT shows off usably quick RISC-V mini desktop
The Tick-Tock AI Development Cycle.
🖥️
Systems Programming
wilsoniumite.com
·
1d
1 day ago
Actions for The Tick-Tock AI Development Cycle.
RISC-V
edge box packs dual GbE, CAN, and 4G/5G support
💪
ARM
linuxgizmos.com
·
4d
4 days ago
Actions for RISC-V edge box packs dual GbE, CAN, and 4G/5G support
Tabs and Site Info
💪
ARM
Content type:
Blog
vivaldi.com
·
21h
21 hours ago
Actions for Tabs and Site Info
Vortex expands open
RISC-V
graphics
🖥️
Systems Programming
jonpeddie.com
·
1d
1 day ago
Actions for Vortex expands open RISC-V graphics
Analysts Zephyr and Teortaxes outline engineering requirements for Huawei's projected 30KW wafer-scale LogicFolding Ascend
processorCooling
requires stacked
SRA
...
💪
ARM
Content type:
News
digg.com
·
6d
6 days ago
Actions for Analysts Zephyr and Teortaxes outline engineering requirements for Huawei's projected 30KW wafer-scale LogicFolding Ascend processorCooling requires stacked SRA...
Percona Operator for MySQL (PXC) 1.20.0: Automatic Storage Resizing, TLS Certificate Rotation, and
ARM64
Support
💪
ARM
Content type:
Blog
percona.com
·
2d
2 days ago
Actions for Percona Operator for MySQL (PXC) 1.20.0: Automatic Storage Resizing, TLS Certificate Rotation, and ARM64 Support
Recipe/Ingredient taxonomy/Ingredient linking
🐘
PostgreSQL
wiki.openfoodfacts.org
·
18h
18 hours ago
Actions for Recipe/Ingredient taxonomy/Ingredient linking
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