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CPU Caches
📦 CPU Caches
Specific
cache hierarchy, L1 L2 L3, cache miss, memory bandwidth, NUMA
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🧠
NUMA
edera.dev
·
5d
5 days ago
NUMA
: Cores,
memory
, and the distance between them
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Actions for NUMA: Cores, memory, and the distance between them
🧠
FPGA Memory
TechPowerUp
·
5d
5 days ago
China's LineShine Debuts as World's Fastest 2 ExaFLOP Supercomputer
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Actions for China's LineShine Debuts as World's Fastest 2 ExaFLOP Supercomputer
🧠
NUMA
Hypertexthero
·
5d
5 days ago
Sightread
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NUMA
substackcdn.com
·
3d
3 days ago
Debugging sched_ext Behavior Using the sched_ext_dump Tracepoint
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Substack
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Actions for Debugging sched_ext Behavior Using the sched_ext_dump Tracepoint
⚙️
Work-Stealing
ClickHouse Blog
·
3d
3 days ago
Announcing Silk: a silky smooth fiber runtime for ClickHouse
Discussed on
Hacker News
and
Lobsters
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NUMA
medium.com
·
3d
3 days ago
CPU
Affinity,
NUMA
& Linux Scheduler Internals: Thinking Like a Linux Performance Engineer (P3)
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Actions for CPU Affinity, NUMA & Linux Scheduler Internals: Thinking Like a Linux Performance Engineer (P3)
Less-relevant results
🔗
RDMA
nvidia.github.io
·
4d
4 days ago
Zero-Copy Data Movement from NIC to GPU at 100s of Gbps
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🖥️
GPU Computing
arXiv
·
4d
4 days ago
A 35B Hybrid-Attention Mixture-of-Experts Model on a 6GB 2011 GPU: Hand-Written 4-bit CUDA Inference for Fermi
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Actions for A 35B Hybrid-Attention Mixture-of-Experts Model on a 6GB 2011 GPU: Hand-Written 4-bit CUDA Inference for Fermi
💾
Cache Optimization
david.alvarezrosa.com
·
3d
3 days ago
Tuning a Server for Benchmarking
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Hacker News
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FPGA Memory
The Register
·
4d
4 days ago
Chinese supercomputer using local processors heads TOP500 list
Covers
Yuanchang Zhou12\#, Hongyu Wang12\#, Yiming Du12\#, Yan Wang12\#, Mingzhen Li12\#, Siyu Hu12\#, Xiangyu Zhang12,
Covered by
Techrights
,
kite.kagi.com
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FPGA Memory
ServeTheHome
·
4d
4 days ago
Arm CPUs Take
Number
1 in Latest Top500 List with Chinese LineShine
Covers
China builds exascale supercomputer without GPUs
Covered by
kite.kagi.com
,
Xataka
Discussed on
r/hardware
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FPGA Memory
David Noel Ng
·
6d
6 days ago
2x GH200 for LLM inference, Part 3: GLM-5.2, expert offload, and the
CPU
question
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Actions for 2x GH200 for LLM inference, Part 3: GLM-5.2, expert offload, and the CPU question
⚡
Concurrency
How Tech Newsletter
·
5d
5 days ago
Developing a Custom DSQ Manager for sched_ext
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Substack
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FPGA Memory
TechRadar
·
3d
3 days ago
China’s Lineshine ‘came out of nowhere’ to grab title of most powerful computer in the known universe
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⚡
Hardware Acceleration
nextplatform
·
3d
3 days ago
A Deep Dive On China’s “LineShine”
All-CPU
, Exaflops-Class Supercomputer
Covers
Yuanchang Zhou12\#, Hongyu Wang12\#, Yiming Du12\#, Yan Wang12\#, Mingzhen Li12\#, Siyu Hu12\#, Xiangyu Zhang12,
Discussed on
Hacker News
and
r/hardware
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Actions for A Deep Dive On China’s “LineShine” All-CPU, Exaflops-Class Supercomputer
🚀
Kernel Bypass
NVIDIA Technical Blog
·
6d
6 days ago
Enable Real-Time AI for High-Speed Data Acquisition with DAQIRI
Covered by
pokde.net
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🧠
NUMA
Hypertexthero
·
3d
3 days ago
❦ Hydrasynth Explorer notes
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⚡
Concurrency
Internals for Interns
·
6d
6 days ago
The Scheduler
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Actions for The Scheduler
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