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Scoured 230 posts in 15.4 ms
DUAL-BLADE: Dual-Path NVMe-Direct KV-Cache Offloading for Edge LLM Inference  ⚡Low-Latency Systems
arxiv.org·6d
RaMP: Runtime-Aware Megakernel Polymorphism for Mixture-of-Experts  ♟️Chess Engines
arxiv.org·6d
Towards the Democratization and Standardization of Dynamic Resources with MPI Spawning  ⚡Low-Latency Systems
arxiv.org·5d
AnTi-MiCS: Analytical Framework for Bounding Time in Embedded Mixed-Criticality Systems  ⚡Low-Latency Systems
arxiv.org·5d
MPI Malleability Validation under Replayed Real-World HPC Conditions  ⚡Low-Latency Systems
arxiv.org·6d
AMMA: A Multi-Chiplet Memory-Centric Architecture for Low-Latency 1M Context Attention Serving  ⚡Low-Latency Systems
arxiv.org·6d
A Test Taxonomy and Continuous Integration Ecosystem for Dynamic Resource Management in HPC  🌐Distributed Systems
arxiv.org·6d
Characterizing Path-Independent Fees: A Route to Zero Impermanent Loss in CPMMs  ⚡Low-Latency Systems
arxiv.org·5d
NeuroRing: Scaling Spiking Neural Networks via Multi-FPGA Bidirectional Ring Topologies and Stream-Dataflow Architectures  ⚡Hardware Acceleration
arxiv.org·5d
Akita: A High Usability Simulation Framework for Computer Architecture  📐Data-Oriented Design
arxiv.org·5d
DMRlib: Easy-coding and Efficient Resource Management for Job Malleability  ⭕Ring Buffers
arxiv.org·6d
(POSTER) From Sensors to Insight: Rapid, Edge-to-Core Application Development for Sensor-Driven Applications  📐Data-Oriented Design
arxiv.org·1d

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