Making for a bit more exciting weekend is that minutes ago AMD has posted their first patch for enabling Zen 6 processor support within the GNU Compiler Collection (GCC) for -march=znver6 targeting.
Last month AMD posted their GNU Binutils patch for Zen 6 that confirmed the new ISA features for these next-gen Ryzen and EPYC processors. So for the past few weeks we already have known the new ISA capabilities coming with Zen 6: AVX512_BMM, AVX_NE_CONVERT, AVX_IFMA, AVX_VNNI_INT8, AVX512_FP16. Over Zen 5, Zen 6 is namely bringing more AVX/AVX-512 additions and worth a special call-out is the new AVX-512 BMM as new bit m…
Making for a bit more exciting weekend is that minutes ago AMD has posted their first patch for enabling Zen 6 processor support within the GNU Compiler Collection (GCC) for -march=znver6 targeting.
Last month AMD posted their GNU Binutils patch for Zen 6 that confirmed the new ISA features for these next-gen Ryzen and EPYC processors. So for the past few weeks we already have known the new ISA capabilities coming with Zen 6: AVX512_BMM, AVX_NE_CONVERT, AVX_IFMA, AVX_VNNI_INT8, AVX512_FP16. Over Zen 5, Zen 6 is namely bringing more AVX/AVX-512 additions and worth a special call-out is the new AVX-512 BMM as new bit manipulation instructions for matrix multiply and bit reversal. AVX-512 BMM isn’t found on any Intel processors currently while the other AVX additions are already plumbed into GCC due to their usage by select Intel processors.
This initial GCC patch for AMD Zen 6 adds Zen 6 CPU detection based upon the Family/Model ID as well as detecting Zen 6 for now based on the presence of the new AVX-512 BMM instructions. The patch then enables the various ISA features. For now the Zen 6 instruction cost table is simply a copy-paste of the Zen 5 cost table without any special tuning at this time.
AMD engineer Umesh Kalvakuntla commented with today’s patch for GCC:
"This patch adds support for AMD znver6 processor. For avx512bmm instructions, this patch adds the intrinsics support. Code-generation and runtime tests will be added in the future patches."
It used to be that AMD wouldn’t post compiler patches for new CPUs / ISA features until their new processors were actually launching/launched. This was a big mistake, especially on the GCC side given their annual major releases and even on the LLVM side with six-month release cycles and most Linux distributions not punctually moving to new compiler point releases. Thankfully with Zen 5 we saw the compiler support early and with Zen 6 we are seeing the compiler toolchain patches begin to appear ahead of the new EPYC / Ryzen processors launching in 2026. Hopefully they will have follow-up patches with more tuning / cost tables and other optimizations ahead of launch.
Given the timing, this initial AMD znver6 patch should be merged safely in time for the GCC 16 stable release (GCC 16.1) that will be out in March~April.