SUSE and Openchip partner to develop sovereign European RISC-V accelerators (opens in new tab)

SUSE and Openchip have announced a collaboration to develop a fully sovereign European IT infrastructure based on the RISC-V instruction set architecture. This partnership aims to address the lack of autonomous hardware options by combining Openchip’s upcoming silicon designs with SUSE’s established open-source software stack. By utilizing RISC-V, the initiative avoids the restrictive licensing fees and geopolitical dependencies associated with traditional x86 and Arm architectures. <a href="