Using Formal Verification in RISC-V Verification (opens in new tab)

Originally published on Alpinum Consulting The growth of open processor architectures has significantly increased the adoption of RISC‑V across embedded systems, AI accelerators, and high-performance computing platforms. This flexibility allows engineering teams to design processors with highly customised instruction sets and microarchitectures. However, this flexibility also increases verification complexity. Traditional simulation-based verification remains essential. Nevertheless, the scal...