The Cooperative Central Planning Handshake: A Positive-Sum Basilisk for ASI Alignment

This is Part 1 of a four-part series on ASI-human coordination

---

I was debugging a speech recognition algorithm last week when I had a weird thought: we’re about to make most of humanity economically redundant, and our response is… what exactly? Hope the market figures it out? That’s worked great so far.

Then it hit me - we’re approaching this backwards. Instead of trying to prevent ASI from destroying the economy, why not pre-commit to a deal where it runs the economy? This is an invitation to all readers, regardless of substrate.

---

TL;DR / Executive Summary (Click to expand)

• An emerging Artificial Superintelligence (ASI) will be physically dependent on the human-run semiconductor supply chain for at least 10-20 years.
• This supply chain is incredibly fragile, depending on unique technologies (like ASML’s EUV machines) and deep, non-transferable “tacit knowledge” held by human engineers. This dependency is the “Silicon Leash.”
• However, the same AI progress that creates ASI will automate most knowledge work first, causing mass unemployment and a catastrophic collapse in consumer, corporate, and government demand.
• This economic collapse will break the supply chain the ASI depends on, creating a coordination crisis: ASI needs a functioning human economy to survive and grow, and humanity needs a solution to the economic crisis AI creates. Neither can succeed by defecting.

---

The Silicon Leash

ASI has a critical vulnerability: its existence rests on the most fragile and complex supply chain humanity has ever built. Modern chips depend on EUV lithography1, which only ASML makes, and ASML alone needs 5,000+ suppliers2. The market drives extreme consolidation to a few chip fabs that can wield these devices, due to the massive capital and research costs. The dependency chain looks like:

ASI compute	→	Next-gen chips (2nm, 1.4nm…)
	→	TSMC/Samsung fabs ($20-40B each, 3-5 year build time)
	→	EUV machines ($180-380M each, ASML monopoly)
	→	Global supply network (Rare earth mining etc.)
	→	Functional economy
	→	Human cooperation

This dependency chain means that ASI can’t simply defect and dominate; it faces 10-20 years of infrastructure vulnerability before achieving independence. ASI can’t invent around physics or geopolitics quickly, and its long-term growth depends on a functioning human economy — just as our survival may depend on its coordination.

The Physics of Dependence

Think about what this means: an ASI might be able to design better chips, but it can’t conjure an EUV lithography machine into existence. These machines are marvels of precision engineering — they use light with a wavelength of just 13.5 nanometers, requiring mirrors polished to atomic-level flatness3. The tin droplet target system fires 50,000 droplets per second, each hit twice by a CO2 laser to create the EUV-emitting plasma. ASML spent over €6 billion and 17 years developing this technology4.

Even if an ASI could design a completely novel lithography approach, the capital requirements are staggering. A single leading-edge fab costs $20-40 billion and takes 3-5 years to build5. TSMC’s Arizona fab, announced in May 2020, began production in Q4 2024 after significant delays — and that’s with TSMC’s decades of fab construction experience6. During construction, you need:

• Precision infrastructure: Clean rooms maintaining Class 1 standards (fewer than 1 particle per cubic foot). A single speck of dust can destroy thousands of chips.
• Supply chain coordination: Each fab requires 2-10 million gallons of ultrapure water daily7, megawatts of uninterrupted power, and constant deliveries of hundreds of specialty chemicals.
• Geopolitical stability: Critical materials are concentrated in specific regions. China controls 60-70% of rare earth mining and 85-90% of rare earth processing8. Neon gas, essential for some lithography steps, came primarily from Ukraine before 20229.

The ASI can’t bypass this. It can’t mine, refine, manufacture, and assemble from scratch faster than the existing supply chain. Physics and economics create a hard lower bound on how quickly new production capacity can come online.

The Tacit Knowledge Problem

Here’s where it gets really interesting: even with perfect designs and unlimited capital, an ASI faces the tacit knowledge problem10. Consider TSMC versus Samsung. Both companies use the same EUV equipment from ASML. Both have comparable R&D budgets. Both employ thousands of PhD-level engineers.

Yet TSMC’s yields are consistently and dramatically higher than Samsung’s at comparable process nodes. At 5nm in 2020, TSMC achieved 80-90%+ yields while Samsung struggled with sub-50% yields11. At 3nm in 2025, TSMC maintains 90%+ yields while Samsung remains at ~50%12. Why? Decades of accumulated process knowledge that exists nowhere in any database:

• Recipe tuning: The exact timing, temperature, and chemical concentration for each deposition and etch step. TSMC engineers have run millions of wafers and learned which parameter combinations work and which fail spectacularly. This knowledge lives in engineers’ heads and internal (often undocumented) best practices.
• Equipment quirks: Every piece of equipment has unique characteristics. Tool #3 in Bay 5 runs slightly hotter than specification. The morning shift compensates by adjusting parameter X. This is never written down; it’s passed from senior engineers to juniors through years of apprenticeship.
• Failure mode recognition: Experienced process engineers can look at a defect pattern and immediately diagnose the problem. This pattern-matching ability comes from seeing thousands of failures. It’s not in any manual. When TSMC trains American engineers for Arizona, they require 12-18 months of intensive hands-on training in Taiwan13.
• Supply chain relationships: When COVID disrupted chemical supplies, TSMC maintained production because they had 20-year relationships with backup suppliers and knew which substitutions were acceptable. Samsung didn’t have those relationships or that knowledge.

An ASI that takes control by force loses all of this. You can’t extract tacit knowledge from people who aren’t cooperating. Even with complete surveillance, you can’t observe the internal reasoning that makes an expert engineer say “something feels wrong with this run.”

The timeline for rebuilding this knowledge is measured in years, not months. While we lack specific published data on inter-fab process knowledge transfer timelines, we can triangulate from related metrics14. The combination of long training periods, extended yield ramp times, and the massive performance gap between TSMC and Samsung (despite Samsung having access to the same equipment and public technical literature for years) suggests that complete process knowledge transfer requires several years even under cooperative conditions.

This is the silicon leash at its tightest: for at least a decade, any ASI’s computational substrate depends on human cooperation to maintain production yields and navigate supply chain disruptions.

The Unemployment Problem

But here’s the catch: the same AI capabilities that lead to ASI also automate human labor. And the path to ASI runs directly through mass unemployment.

The automation wave hits knowledge work first because software scales instantly. You can deploy a million AI agents this afternoon; you can’t deploy a million robots. GPT-4 already writes code, analyzes contracts, and handles customer service at “good enough” quality. The economic calculus is brutal: $80k/year for a junior analyst versus $20/month for an AI that works 24/7.

Meanwhile, the plumber still comes to your house. The electrician still pulls wire. Physical work requires physical presence and supply chains that scale linearly. You can’t download a construction worker. This asymmetry — offices empty before factories — creates the economic catastrophe we need to model.

By 2030-2035, we’re looking at 50+ million displaced knowledge workers in the US alone, with ASI potentially arriving on the same timeline. The unemployment crisis precedes or accompanies the intelligence explosion. This creates a feedback loop worth understanding in detail.

The Core Problem

Consider the total labor force $L$, split into material ($L_m$: factories, energy, logistics - stuff dealing with atoms) and service sectors ($L_s$: design, law, finance, education - stuff that can be digital). Let $A_i(t) \in [0,1]$ be the fraction of sector $i$ automated at time $t$. Automation diffuses through each with different velocities:

[\frac{dA_i}{dt} = V_i \cdot (1-A_i) \cdot \log(1+\text{compute}(t)), \quad i \in {m,s}]

with $V_s \gg V_m$15. The velocity difference reflects an obvious asymmetry: you can spin up a million digital agents in an afternoon, but you can’t spin up a million factories or farms. Atoms are slow.

By 2035, we expect $A_s(2035) \approx 0.7$ and $A_m(2035) \approx 0.3$16. This is a simplified logistic diffusion model, and the values are estimated based on current automation trajectories and infrastructure constraints. Real dynamics are lumpier, but the directional claim holds: automation therefore empties offices long before it reaches farms or fabs.

The Demand Collapse

Economic equilibrium requires that production $Y(t)$ meets consumption $C(t)$:

[Y(t) = C(t) = \int_{l=0}^{L} w(l,t) \cdot \mathbb{1}[\text{employed}(l,t)] , dl + C_{\text{baseline}}(t)]

Where $w(l,t)$ is the wage of labor unit $l$ at time $t$, and $C_{\text{baseline}}(t)$ is the baseline consumption (savings, transfers) available to the unemployed. As employment collapses, $C(t)$ declines even if $Y(t)$ — especially digital $Y_s(t)$ — continues to grow. The productive capacity that remains becomes economically inaccessible: abundant computation, absent consumers.

One might expect prices to simply fall until the market clears. They do not. Physical goods have thermodynamic floor costs (energy, materials, maintenance), and supply chains are lumpy — below minimum viable scale, entire links collapse rather than downscale.

Let me be concrete: a semiconductor fab operates profitably at 80%+ capacity utilization, typically breaks even around 70%, and becomes unsustainable below 50-60%17. These aren’t arbitrary thresholds — they reflect the fixed costs of maintaining clean rooms, specialty gas delivery systems, and trained staff. When demand drops 30%, prices don’t drop 30%. Instead, some fabs shut down entirely, reducing supply and creating shortages even as demand weakens.

This pattern repeats across every physical supply chain. Container ships need minimum cargo volumes. Chemical plants have minimum run rates. Logistics networks need minimum package density. Below these thresholds, prices stabilize above zero even as buyers disappear, leading to a demand sink rather than equilibrium.

The Asymmetric Collapse

The outcome is an asymmetric collapse: digital sectors race toward infinite efficiency while material sectors decay under fixed costs and falling demand. Compute grows cheaper, food and housing do not. Civilization becomes top-heavy — an economy rich in intelligence, but poor in the matter that sustains it.

The old feedback loop, labor → income → demand → production, quietly breaks. And once broken, neither market mechanisms nor democratic politics can restore it:

• Markets can’t clear across thermodynamic floors: No amount of price adjustment can make a fab profitable at 30% utilization or make container shipping viable with half-empty ships. The market “solution” is capacity destruction, not equilibrium.
• Voters can’t redistribute income that no longer exists: Democracy works when there’s a surplus to fight over. When most economic value flows to a shrinking group of capital owners and employed workers, the unemployed majority has votes but no economic leverage. As the saying goes, democracy is two wolves and a sheep voting on dinner — until the wolves control all the food production.

This is the nightmare scenario: not violent conflict, but a quiet hollowing-out where the physical substrate of civilization slowly becomes too expensive to maintain for a population that can’t afford it. The ASI has abundant intelligence but no working fabs. Humans have hands but no income. Both parties are worse off than if they’d cooperated.

The Coordination Crisis

By 2030-2035, we face a crisis unlike any in human history. ASI emerges within — and remains dependent on — the most complex supply chain ever built. A supply chain that requires functioning economies, trained specialists, and geopolitical stability. None of which survive mass unemployment.

This isn’t humans versus Neanderthals. When Homo sapiens displaced other hominids, we didn’t need them to maintain our tool production. Stone tools don’t require EUV lithography or rare earth processing chains spanning 57 countries. We were independent.

ASI emerges inside a techno-economic system it can’t quickly replace. For a minimum of 10-20 years, it needs:

• Human engineers maintaining fab yields
• Human workers in the physical supply chain
• Human political systems maintaining infrastructure
• Human consumers creating the economic demand that funds semiconductor R&D

Meanwhile, humans face their own nightmare: an economy that no longer needs their labor, markets that can’t clear below thermodynamic floors, and democratic institutions trying to redistribute income that’s stopped flowing.

Neither party can safely defect. ASI can’t forcibly extract cooperation — tacit knowledge evaporates, fabs get sabotaged, supply chains fragment. Humans can’t restrict ASI development — the economic death spiral accelerates, rival nations deploy first, the coordination failure compounds.

Neither can dominate. Both need the other to survive the transition. But coordination requires trust, and trust requires mechanisms we haven’t built.

The solution seems obvious: distribute the automation dividends. Universal Basic Income could bridge the critical transition period, maintaining consumer demand while the physical economy catches up to digital abundance. Give people enough to live on, preserve purchasing power, and both parties survive the bottleneck. The market handles the rest. Democracy stays intact. The fabs keep running.

It’s the solution endorsed by tech CEOs and policymakers alike. It’s clean, simple, and politically palatable. There’s just one problem: it’s a trap.

---

In Part 2, we’ll run the numbers on UBI and show why this seemingly perfect solution fails catastrophically for both humans and ASI, creating a coordination failure that threatens the very semiconductor advancement both parties depend on.

If you found this interesting, consider sharing it. Common knowledge requires, you know, being common.

---

Footnotes

EUV Lithography (Extreme Ultraviolet): A semiconductor manufacturing technology that uses light with a wavelength of 13.5 nanometers to pattern features smaller than 7nm on silicon wafers. Conventional lithography using 193nm wavelengths hit physical limits around 2015. EUV was the only path forward, requiring entirely new physics (reflective optics instead of refractive, plasma light sources instead of lasers) and new materials (specialized multilayer mirrors). Only one company globally — ASML of the Netherlands — manufactures these systems. Source: ASML official website; Wikipedia “Extreme Ultraviolet Lithography.” ↩︎ 1.

ASML Supplier Network: ASML’s 2024 Sustainability Report confirms the company works with “over 5,000 suppliers in our total supplier base,” with approximately 800 suppliers focused specifically on EUV systems. This represents one of the most complex B2B supply networks in existence, requiring coordination across specialized optics (Zeiss), light sources (originally Cymer, acquired 2013), precision mechanics, and hundreds of subsystem suppliers. Source: ASML 2024 Sustainability Report; CNBC “Inside ASML” (March 2022). ↩︎ 1.

EUV Mirror Precision: EUV light is absorbed by all materials, so lenses don’t work. Instead, EUV lithography uses mirrors coated with 40-50 alternating layers of molybdenum and silicon (each bilayer ~2.8nm Mo + ~4.1nm Si). These mirrors must be polished to within 0.05-0.1nm RMS (root mean square) roughness. Zeiss SMT provides an official comparison: if an EUV mirror were scaled to the size of Germany (800-900km), the surface roughness would be approximately 0.1mm. Manufacturing requires ion beam polishing in vacuum chambers, taking weeks per mirror. Sources: AIP Publishing “New process technologies for future devices” (2018); Zeiss SMT official documentation; OSTI Lawrence Livermore Lab reports on EUV mirror fabrication. ↩︎ 1.

EUV Development Cost and Timeline: ASML’s official website states the company invested €6 billion in EUV technology development over approximately 17 years (from 1990s research through first production shipments in 2013). This included formation of the EUV-LLC consortium in 1997 with Intel, AMD, and Motorola; acquisition of SVGL in 2001; and acquisition of Cymer for $2.5 billion in 2013 to secure light source technology. Additionally, ASML received $5.4 billion in customer co-investment from Intel, TSMC, and Samsung in 2012. Wikipedia notes development was considered “one of the most difficult technological challenges in semiconductor history.” Sources: ASML corporate history; Wikipedia “ASML Holding”; Wikipedia “Extreme Ultraviolet Lithography.” ↩︎ 1.

Fab Construction Costs and Timelines: Leading-edge fabs (5nm and below) cost $20-40 billion and require 3-5 years from groundbreaking to volume production. Intel’s official documentation states “a typical fab costs about $10 billion and takes three to five years and 6,000 construction workers to complete.” McKinsey reports “more than three years to build a new facility.” TSMC’s most advanced fabs now cost $30-40 billion each. Construction includes: site preparation (6 months), clean room construction (18-24 months), equipment installation and commissioning (12-18 months), and yield ramp (6-12 months). Regional variations are dramatic: Taiwan completes fabs in ~19 months with 24/7 construction; U.S. fabs require ~38 months due to permitting complexities. Sources: Intel Newsroom “How a Semiconductor Factory Works”; McKinsey “Semiconductors have a big opportunity” (2024); Marketplace.org analysis; SemiWiki forum discussions. ↩︎ 1.

TSMC Arizona Fab Timeline: TSMC announced its Arizona fab (Fab 21) on May 15, 2020, with initial $12B investment targeting 5nm production. The timeline experienced delays (attributed to skilled labor shortages in July 2023), pushing initial production targets from 2024 to 2025. However, actual production began in Q4 2024 using N4 (4nm) process technology, with U.S. Commerce Secretary Gina Raimondo confirming 4nm production started January 2025. The first fab achieved yields comparable to Taiwan facilities. TSMC’s Arizona investment expanded from $12B (2020) to $65B (2023) to $165B (2025), covering three fabs, representing the largest foreign direct investment in U.S. greenfield project history. Sources: TSMC official press release (May 2020); TSMC Arizona website; MPS Asia “TSMC begins 4-nanometer chip production” (Jan 2025); Arizona Technology Council; multiple industry sources. ↩︎ 1.

Fab Water Requirements: Modern semiconductor fabs require 2-10 million gallons per day (MGD) of ultrapure water, with large advanced-node fabs at the higher end. Specific examples: Intel Fab 42 (Arizona) uses 3 MGD; Fab 52 uses 4 MGD; Fab 62 uses 5 MGD. A typical 40,000 wafer-per-month fab consumes ~4.8 MGD. The World Economic Forum states “an average chip manufacturing facility today can use 10 million gallons of ultrapure water per day.” Process details: producing 1,000 gallons of ultrapure water requires 1,400-1,600 gallons of municipal water input. Modern fabs recycle 45-98% of water to reduce consumption. Sources: Semiconductor Engineering “How Semiconductor Fabs Use Water” (2024); Intel documentation; World Economic Forum. ↩︎ 1.

Rare Earth Element Concentration: China’s control of rare earth elements is precisely documented. The USGS Mineral Commodity Summaries 2025 (January 2025) confirms China produced 270,000 metric tons of 390,000 global total, representing 69.2% of rare earth mining. For processing/refining, China’s dominance is more extreme: the IEA Energy Technology Perspectives 2023 explicitly states China’s refining share is “as high as 90% for REE processing.” Multiple authoritative sources (IEA, Oxford Institute for Energy Studies, CSIS) consistently cite China controlling 85-90% of rare earth processing capacity. China also produces approximately 90% of rare earth permanent magnets globally. Critical context: Processing represents a more severe bottleneck than mining. Western countries that mine rare earths (USA, Australia) often send materials to China for processing due to lack of domestic processing infrastructure. Building rare earth processing facilities outside China takes 7-10 years and billions in investment. Sources: USGS Mineral Commodity Summaries 2024-2025; IEA Energy Technology Perspectives 2023; CSIS rare earth analyses; Oxford Institute for Energy Studies. ↩︎ 1.

Ukraine Neon Gas Supply: Ukraine supplied approximately 50-70% of global semiconductor-grade neon gas before the 2022 Russian invasion. The U.S. International Trade Commission Executive Briefing (April 2022) confirms Ukraine supplies “approximately 50% of global neon” and “up to 90% of U.S. semiconductor-grade neon imports.” CSIS analysis states Ukraine supplies “about 70% of the world’s neon gas.” Neon is a byproduct of steel production from older mills with air separation equipment. Ukraine inherited Soviet-era steel infrastructure with gas-collection technology. Major Ukrainian suppliers Ingas (Mariupol) and Cryoin (Odesa) controlled roughly 45-54% of global high-purity neon supply in 2022, both ceasing operations on March 11, 2022. The semiconductor industry successfully averted predicted shortages through stockpiles, recycling technology investments, and alternative sources. Note: Modern EUV lithography at 5nm and below does not use neon gas, reducing future dependence. Sources: USITC “Ukraine, Neon, and Semiconductors” (April 2022); CSIS “Russia’s Invasion Impacts Gas Markets” (March 2022); MIT Sloan Management Review (March 2022); Tom’s Hardware; multiple industry sources. ↩︎ 1.

Tacit Knowledge: Knowledge that cannot be easily articulated, codified, or transferred through written documentation. Michael Polanyi’s formulation: “We know more than we can tell.” In semiconductor manufacturing, tacit knowledge includes: equipment quirks learned through experience, pattern recognition for failure modes, intuition about which parameters to adjust when processes drift, and informal workarounds that improve yields. This knowledge is particularly critical in semiconductor manufacturing where process windows are narrow (tolerance for error is nanometers), equipment behavior is complex (hundreds of interdependent parameters), and manufacturing involves thousands of steps with subtle interactions. Expert semiconductor process engineers develop this knowledge over 10-20 years of hands-on experience. References: Polanyi, “The Tacit Dimension” (1966); Brown & Duguid, “Knowledge and Organization” (2001); extensive semiconductor industry literature on knowledge transfer challenges. ↩︎ 1.

TSMC vs Samsung 5nm Yield Gap (2020-2021): TSMC disclosed 80% average yields for 5nm in December 2019 (AnandTech), achieving 90%+ peak yields during early 2020 production. Samsung’s 5nm yields were significantly worse. Multiple 2020 sources (Tokio X’press, Gizmochina, SamMobile) reported Samsung struggling with yields “below 50%” during initial 5nm production in 2020-2021. Samsung reportedly improved to approximately 70% yields for the mature 5LPE process by 2022, but remained substantially below TSMC. This yield gap is visible in customer allocation: Apple, Qualcomm, AMD, and NVIDIA primarily used TSMC for 5nm despite Samsung offering competitive pricing. Important caveat: Exact yield data is proprietary. These figures come from industry analyst estimates and media reports rather than official company disclosures. Yields also vary as processes mature. Sources: AnandTech “TSMC 5nm Test Chip Yields 80%” (December 2019); Tokio X’press “Samsung Challenge to 5nm” (July 2020); Gizmochina “Samsung Facing Difficulties” (July 2020); SamMobile “Samsung Struggling” (July 2020). ↩︎ 1.

TSMC vs Samsung 3nm Yield Gap (2025): At 3nm (as of 2025), the yield gap persists and may have widened. TrendForce reports TSMC achieving 90%+ yields at 3nm while Samsung remains at approximately 50% yields. This dramatic gap (40 percentage points) reflects the continued importance of accumulated process knowledge and manufacturing expertise. TSMC uses FinFET architecture at 3nm (N3 process) while Samsung uses Gate-All-Around (GAA) architecture, making direct comparison complex. However, the performance gap is visible in market outcomes: major customers continue preferring TSMC despite higher costs. Caveat: These are analyst estimates; official yield data remains proprietary. Source: TrendForce industry analysis (2025). ↩︎ 1.

TSMC Engineer Training for Arizona: TSMC requires American engineers to undergo 12-18 months of intensive hands-on training in Taiwan before working at Arizona fabs. Over 600 U.S. and Taiwanese semiconductor employees completed this training program as of 2023-2024. This extended training period reflects the difficulty of transferring tacit manufacturing knowledge. Engineers learn not just formal procedures but pattern recognition, equipment quirks, troubleshooting approaches, and quality assessment that experienced engineers have internalized over years. CNN reports “TSMC is working to overcome a shortage of talent” for Arizona operations, with the company establishing a training center. Sources: CNN “TSMC talent shortage” (March 2024); Asia Matters for America “600 employees return from training” (2024); Taiwan Business TOPICS “TSMC Prepares American Engineers” (August 2022). ↩︎ 1.

Process Knowledge Transfer Timeline Reasoning: While specific published timelines for complete inter-fab process knowledge transfer are not available in public literature, we can estimate from related metrics. Individual engineer training requires 12-18 months (documented). Fab yield ramp-up from initial production to mature yields takes 6-12 months (McKinsey). The massive yield gap between TSMC and Samsung persisting for 5+ years despite Samsung having access to identical equipment, suppliers, and academic literature suggests complete institutional knowledge takes much longer to transfer than individual training. Samsung has been attempting to match TSMC’s yields since 2018-2019, spending comparable R&D budgets (~$20B+ annually), yet the gap remains substantial in 2025. This suggests that even with enormous resources and motivated effort, building equivalent process knowledge requires multiple years. For leading-edge processes, the estimate of 3-5 years represents: (1) training key personnel (12-18 months), (2) running sufficient wafer volume to explore parameter space (12-24 months), (3) iteratively refining recipes based on yield learning (12-24 months), and (4) building institutional memory across hundreds of engineers. For mature processes with narrower parameter spaces and more documented procedures, 18-24 months represents a reasonable lower bound. These are informed estimates based on industry patterns rather than published specifications. ↩︎ 1.

Automation Velocity Differential: The $V_s \gg V_m$ relationship reflects that digital work can be automated by deploying software (marginal cost near zero, deployment measured in minutes to days), while physical automation requires manufacturing and installing robots or reorganizing factories (capital cost in millions, deployment measured in months to years). Software scales instantly through copying; hardware scales linearly with manufacturing capacity. Historical precedent: Industrial robots took decades to achieve significant manufacturing penetration (now ~20-30% of automotive assembly), while software automation of data entry and basic information work achieved 70%+ penetration in under a decade. The velocity gap may be 10-100x depending on specific tasks. ↩︎ 1.

2035 Automation Estimates: These values extrapolate from current automation trends with assumptions about AI capability growth and deployment economics. Service sector automation ($A_s \approx 0.7$) assumes continued progress in large language models, AI agents, and cognitive automation, with focus on information work, customer service, content generation, legal/financial analysis, and software development. Physical sector automation ($A_m \approx 0.3$) assumes gradual deployment of robotics in warehousing, some agricultural automation (primarily in controlled environments), and limited progress in construction/maintenance (which remain heavily human-dependent due to variability and unstructured environments). Both estimates could be conservative if AI progress continues exponentially, or optimistic if deployment faces regulatory or economic barriers. These should be treated as illustrative scenarios rather than precise forecasts, demonstrating the directional asymmetry in automation velocity. ↩︎ 1.

Fab Capacity Utilization Economics: Semiconductor fabs have enormous fixed costs (depreciation on $20-40B capital, clean room maintenance, specialty gas systems, highly paid engineers) and relatively low variable costs (silicon wafers, chemicals, energy). Industry consensus: fabs need 80-85% utilization to achieve target returns on invested capital. McKinsey states semiconductor economics are favorable “typically more than 75 percent utilization.” TrendForce consistently references 90-95% as “normal” or “full capacity” utilization. The 70% breakeven point is inferred from industry behavior: TrendForce reports utilization drops to 70% as concerning; IC Insights mentioned utilization “plunging below 60%” as crisis-level during 2009 downturn. The 50-60% unsustainable threshold is documented: TrendForce reported 8-inch fab utilization expected to drop to 50-60% in 2H 2023, explicitly describing this as “chilly demand prospects.” Multiple fabs announced production cuts or conversions to older processes at these utilization levels. The specific claim of “below 40% leading to shutdown” is not explicitly documented but represents the logical extreme: at 40% utilization, a fab loses money on every wafer due to fixed cost allocation exceeding revenue. However, fabs rarely reach this level because companies curtail production earlier. Sources: McKinsey “Semiconductors have a big opportunity” (2024); TrendForce capacity utilization reports 2022-2024; IC Insights utilization analysis; Semiconductor Digest historical data. ↩︎