About six months ago, to my surprise, I completed the BoxLambda SoC’s gateware. Since then, I’ve explored various OS projects, programming languages, tools, and ideas for BoxLambda’s software environment. It’s time to commit to a software architecture.

Context

Here’s a TLDR, for those who haven’t read all 33 previous posts: BoxLambda is a hardware-software crossover project creating a homebrew, retro-style FPGA-based microcomputer. The goal is to create a sandbox environment for experimenting with software and FPGA gateware.

The physical setup looks like this:

The physical setup.

BoxLambda’s current features:

  • Target FPGA: Arty-A7-100T.
  • Ibex RISC-V core with machine timer and hardware interrupt support.
  • Harvard architecture-based interconnect.
  • Low-latency registe…

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