Figure outlining the overall system, including the V-MTJ chip and the ASIC along with their respective printed circuit boards. Credit: Duffee et al.

Probabilistic Ising machines (PIMs) are advanced and specialized computing systems that could tackle computationally hard problems, such as optimization or integer factorization tasks, more efficiently than classical systems. To solve problems, PIMs rely on interacting probabilistic bits (p-bits), networks of interacting units of digital information with values that randomly fluctuate between 0 and 1, but that can be biased to converge to yield desired solutions.

A class of PIMs that are intensively investigated use magnetic devices to inject randomness into a digital transistor-based circuit. While these systems have been found to be promising for the rapid resolution of various domain-specific and advanced problems, their large-scale design and reliable fabrication have so far proved challenging. This is primarily because their upscaling requires the precise control of small magnetic moments and often also entails the use of large circuits that convert digital signals into analog voltages and other additional components.

Researchers at Northwestern University and other institutes recently developed a new application-specific integrated circuit (ASIC) that could be used to create better performing probabilistic computers. In a paper published in Nature Electronics, they presented a probabilistic computer based on the new circuit and showed that it could perform integer factorization tasks.

“We were interested in exploring how one could build a scalable probabilistic computer by custom-designing an ASIC using foundry CMOS technology,” Pedram Khalili Amiri, senior author of the paper, told Tech Xplore.

“Our intuition was that by taking advantage of the digital CMOS platform and the high transistor densities available in today’s semiconductor technology, one could eventually build very large-scale probabilistic computers that can tackle problems related to, for example, combinatorial optimization. As a first step, we decided to try out these ideas, and develop the computing architecture and design approach, using a less advanced (130 nm) foundry node.”

When reviewing previous literature in the field and experimenting with probabilistic computing architectures, Amiri and his colleagues realized that, despite its numerous advantages, CMOS technology does not appear to be well-suited for creating random bit sequences. Notably, the creation of these random sequences is central to the functioning of probabilistic computers.

To overcome this limitation of CMOS technology, the researchers adapted voltage-controlled magnetic tunnel junctions (V-MTJs), hardware components that they introduced in their earlier work and had previously applied to the creation of magnetic random-access memory (MRAM) devices. They changed some elements of these devices so that they would serve as high-throughput and compact sources of randomness (i.e., entropy).

“Our probabilistic computer consists of an array of bistable probabilistic elements (called probabilistic bits or p-bits),” explained Amiri. “The interactions between these p-bits can be programmed so that the p-bit network (called a probabilistic Ising machine or PIM) collectively searches through the solution space of a problem. Our p-bits are implemented using digital CMOS circuitry on our ASIC and use bit sequences read from an adjacent V-MTJ chip to provide the required randomness. The energy minimum of the PIM is designed to correspond to the solution of the computing problem of interest.”

Figure showing the ASIC that was used in this experiment. Credit: Duffee et al.

The new probabilistic architecture developed by Amiri and his colleagues could theoretically be used to efficiently tackle many real-world problems, including various optimization tasks. As part of their study, however, the team specifically applied their architecture to integer factorization tasks, which are known to be very challenging to solve computationally.

“This was a good place to start, mainly because there is only one correct solution to be found in the entire energy landscape, and because it is easy to check whether we found the right factors or not,” said Amiri. “The same approach, however, can be applied to many other computing problems.”

Two central advantages of the architecture developed by this research team are that it is digital and synchronous. This is in contrast with most other PIMs introduced in earlier works.

“This means that the probabilistic computer works with a clock that determines a well-defined time interval upon which p-bits can update and does not require area-consuming circuits such as digital-to-analog converters,” said Amiri. “In addition, the use of V-MTJs, which are currently implemented in a separate chip from the ASIC but can eventually be integrated within it, saves area and can provide high-throughput random bit sequences to the p-bits.”

V-MTJs, the components that Amiri and his colleagues used to create their architecture, were found to be inherently more robust against device-to-device variations when used to generate random bits compared to other spintronic random bit generators used in the past. The team’s initial findings were highly promising, highlighting the promise of their approach for creating probabilistic computers.

Notably, although it relies on VMTJs, the new approach is also compatible with established CMOS manufacturing processes and digital design strategies. In the future, it could contribute to the large-scale fabrication of PIMs that could solve a wide range of real-world optimization problems faster and more efficiently.

“Our next step will be to adapt this design to implement problems other than factorization,” added Amiri. “For example, we have a chip in the works that is tailored to other optimization problems with real-world significance. In addition, we plan to integrate the V-MTJs directly on the CMOS in a more advanced foundry node, which would allow us to make the probabilistic computer even more compact.”

Written for you by our author Ingrid Fadelli, edited by Gaby Clark, and fact-checked and reviewed by Robert Egan—this article is the result of careful human work. We rely on readers like you to keep independent science journalism alive. If this reporting matters to you, please consider a donation (especially monthly). You’ll get an ad-free account as a thank-you.

More information: Christian Duffee et al, An integrated-circuit-based probabilistic computer that uses voltage-controlled magnetic tunnel junctions as its entropy source, Nature Electronics (2025). DOI: 10.1038/s41928-025-01439-6. On arXiv: DOI: 10.48550/arxiv.2412.08017

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