⚙️ RISC-V - Velocifyer · Scour

RISC-V Summit Europe 2026 🕹️Hardware Emulation

riscv-europe.org·5d·r/linux

NASA builds space-grade AI compute 🕹️Hardware Emulation

jonpeddie.com·7h

Firefly CSC2-N48SPK3 – A 2880 TOPS RISC-V AI server with 48 SpacemiT K3 Nodes, 48 NVMe SSDs 🎮Linux Gaming

cnx-software.com·1d

Difference between revisions of "ELC 2026 Presentations" 🛠️Maker Projects

The RISC-V Code Models (2026 Edition): medlow, medany, & large 🦀Rust Systems

SiFive Upgrades P500 RISC-V IP Cores 🖥️Modern CPU

embedded.com·6d

CPU IP processes mixed scalar and vector workloads 📡Network Latency

RISC-V and Floating Point 🖥️Modern CPU

fprox.substack.com·2d·Substack

Initial Benchmarks Of The SpacemiT K3 RVA23 RISC-V CPU With The K3 Pico-ITX 🖥️Modern CPU

phoronix.com·12h·Hacker News

karagure/rvkit: Rust + Zig CLI/TUI toolchain for RISC-V microcontroller development. Scaffold, build, flash, monitor. 🐧Rust for Linux

github.com·2d·r/Zig, r/embedded

Community Update 🐘Mastodon

communityblog.fedoraproject.org·5d

When Arm Meets RISC-V: SiPearl, Semidynamics to Co-Develop Sovereign AI Platform 🕹️Hardware Emulation

eetimes.com·17h

Practical Reverse Engineering 🔍Reverse Engineering

datanoisetv.github.io·1d

Banana Pi BPi-RV2 RISC-V Router Board 🍓Raspberry Pi

youtube.com·23h·r/SBCs

GenAI-Driven Approach to RISC-V Supply Chain Exploration ⚡Circuit Breakers

Nvidia: Latest news and insights 🎨Vulkan

networkworld.com·9h

Intel and Qualcomm circle Tenstorrent as the NVIDIA-alternative trade comes due 💻Tech

thenextweb.com·1d

Lilbits: A RISC-V router (crowdfunding), an E Ink color dev kit, and Windows 11 taskbar customization 🖥️Wayland

liliputing.com·5d

OpenBSD 7.9 boosts AMD64 CPU core support, adds delayed hibernation and improves scheduler 🔵Fedora Silverblue

alternativeto.net·15h

#646, May 18th 2026 ⚙️Compilers

llvmweekly.org·2d

Log in to enable infinite scrolling