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💾 Allocator Design
Custom Allocation, Memory Pools, Embedded Systems, Performance
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113042
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AI
Infra
HPC
dev.to
·
1d
·
Discuss:
DEV
📊
Register Machines
Allocators
from C to
Zig
antonz.org
·
2d
·
Discuss:
Lobsters
,
Hacker News
,
r/C_Programming
,
r/programming
🧠
Memory Allocators
chrisarg/Bit
: A
Bit
vector library for learning fun and also work
github.com
·
2h
🔢
Bit Manipulation
The 1:1
Myth
: Why Your
CPU
Can Handle 400 Threads on 4 Cores
dev.to
·
1d
·
Discuss:
DEV
🧠
Memory Hierarchy
From
Buffers
to
Registers
: Unlocking Fine-Grained FlashAttention with Hybrid-Bonded 3D NPU Co-Design
arxiv.org
·
2d
⏲️
Embedded GC
Distributed
Training
Across Mixed GPUs: Solving the Heterogeneous Fleet Problem
shardpool.aurora-sentient.net
·
6h
·
Discuss:
DEV
🗺️
Region Inference
A
Test
Generation
Procedure Targeting Subcircuits With High Susceptibilities To Aging (Purdue University)
semiengineering.com
·
18h
🎯
Instruction Selection
UMEM
:
Unified
Memory Extraction and Management Framework for Generalizable Memory
arxiv.org
·
2d
🧠
Memory Allocators
How
many
registers
does an x86-64 CPU have? (2020)
blog.yossarian.net
·
4h
·
Discuss:
Hacker News
📊
Register Machines
5
Days
, One
GPU
Gameboy Swarm
bkase.io
·
1d
·
Discuss:
Hacker News
🤖
Embedded Go
Linux
7.0
Wires
Up Arm's 64-byte Single-Copy Atomic Instructions LS64/LS64V
phoronix.com
·
6h
💪
ARM64 Backend
Persistent
memory
for AI agents, local-first and open source
engram-ai.dev
·
20h
·
Discuss:
Hacker News
📏
Linear Memory
I
struggled
with
system
design until I learned these 114 concepts
newsletter.systemdesign.one
·
2h
🌍
Minimal HTTP
Here's what 96GB of
LPCAMM2
memory
with LPDDR5X-9600 modules looks like, production coming soon
tweaktown.com
·
18h
🏰
Capability Machines
Breaking
the
Tractability
Barrier: A Generic Low-Level Solver for NP-Hard Instances (N=63) on Commodity 64-Bit Silicon
zenodo.org
·
1d
·
Discuss:
Hacker News
🐹
Minimal Go
The
State
of
Java
on Kubernetes 2026: Why Defaults are Killing Your Performance
akamas.io
·
20h
💾
Zig Allocators
Supercharging
Inference
for AI Factories: KV Cache Offload as a Memory-Hierarchy Problem
blog.min.io
·
2d
⚡
Cache-Aware Algorithms
CUDA
Shared
Memory Bank Conflict-Free Vectorized Access
leimao.github.io
·
1d
🎯
CPU Dispatch
Understanding
the
Go
Compiler: The Linker
news.ycombinator.com
·
9h
·
Discuss:
Hacker News
🤖
Embedded Go
STMicroelectronics
Stellar
P3E quad-core Arm Cortex-R52+ automotive MCU features Neural-ART AI accelerator
cnx-software.com
·
1d
🔌
Microcontrollers
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