Assembly

⚙️ Assembly

Machine Code, Instruction Sets, Assembly Language, Low-Level Programming

Feeds to Scour
SubscribedAll
Scoured 414 posts in 8.9 ms

RISC-V Targets Data Centers, Edge AI, Space

 🔧RISC-V  Content type: News
eetimes.com·

Intel 8086, the First x86 chip, Enters its 50th Year in 2027

 🏗️CPU Architecture
techpowerup.com·

SASM

 🔧Assembly DSLs
flathub.org·

I don't know what this error means

 ⚡Zig  Content type: Discussion
ziggit.dev·

Show HN: Iris – pure-Swift ARM64 disassembler with a semantic layer

 📚PL/0 Compilers  Content type: Code
github.com··Hacker News

Canonical Experimenting With x86-64-v3 Packages For Ubuntu 26.10

 🔀SIMD Programming
phoronix.com··Lobsters, Hacker News

Why x86 Zeroes a Register With `xor eax, eax`

 🏗️CPU Architecture  Content type: Blog
debasishg.github.io·

x86CSS: a working CSS-only x86 CPU/emulator/computer

 🚀V8 Internals
osnews.com
·

NextSilicon to Productize Arbel RISC-V Core into 64-Core Enterprise Processor for AI and HPC

 🔌Microcontrollers
hpcwire.com··r/hardware

Red Hat Releases Second Developer Preview Of RHEL 10 For RISC-V

 🔧RISC-V
phoronix.com·

Best Fixed Cash ISA Rates UK 2026: Should You Even Fix?

 🔒Rust Borrowing  Content type: Discussion
freedomisntfree.co.uk·

"RISC-V Is Now"

 🔌Microcontrollers  Content type: Video
youtube.com··Hacker News

Running DOS on Behringers DDX3216 with a DIY x86-Bios from Scratch

 🔌Microcontrollers  Content type: Blog
chrisdevblog.com··Hacker News

Intel introduced ‘the first processor in the x86 series and the first 8086 microprocessor’ on this day in 1978 — CPU was designed as a temporary substitute for the delayed iAPX 432 project

 📡Network Serialization  Content type: News
tomshardware.com
·

How to Comply with New EU Speed Limit Rules

 🔧Assembly DSLs  Content type: Blog
mapbox.com·

RISC-V Summit Europe 2026: Industry and Academia Unite in Bologna to Advance Open Hardware

 🔧RISC-V  Content type: News
eetimes.com·

Release Nvim 0.12.3 · neovim/neovim

 📝Text Editors  Content type: Code
github.com·

Fedora 44 RISC-V Images Released, Including New "Omni" Kernel For Broader RISC-V Hardware Support

 🔧RISC-V
phoronix.com··Cited by 1 article

RISC-V CPU Performance Up 8x In Five Years: SiFive HiFive Unmatched To SpacemiT K3

 🔧RISC-V
phoronix.com·

(PR) NextSilicon to Productize Arbel RISC-V Core Into 64-Core Enterprise Processor for AI and HPC

 🔌Microcontrollers
techpowerup.com·

Keyboard Shortcuts

Navigation

Next / previous item
j/k
Open post
oorEnter
Preview post
v

Post Actions

Love post
a
Like post
l
Dislike post
d
Undo reaction
u
Save / unsave
s

Recommendations

Add interest / feed
Enter
Not interested
x

Go to

Home
gh
Interests
gi
Feeds
gf
Likes
gl
History
gy
Changelog
gc
Settings
gs
Browse
gb
Search
/

General

Show this help
?
Submit feedback
!
Close modal / unfocus
Esc

Press ? anytime to show this help