🔧 RISC-V

Instruction Set Architecture, Compiler Backends, Open Hardware, Cross-Compilation

Why We Need SIMD
parallelprogrammer.substack.com·15h·
Discuss: Substack
🔀SIMD Programming
Codasip RISC-V processors certified up to ASIL-D
riscv.org·5h
🔧Assembly DSLs
"Best" RISC-V board for creating new operating system.
reddit.com·1d·
Discuss: r/RISCV
🖥️Minimal VMs
Beating the L1 cache with value speculation (2021)
mazzo.li·3h·
Discuss: Lobsters
🔮Branch Predictors
Inside the Chiplet Revolution: How Arm’s Compute Subsystems Platform is Democratizing Custom AI Silicon
newsroom.arm.com·3h
💾Allocator Design
Panther Lake leak: Intel's Core Ultra 9 X388H packs 16 CPU / 12 GPU cores
techspot.com·2h
🔮CPU Branch Prediction
ROCm/TheRock
github.com·17h
🔄Cross-Compilation
Rigorous Evaluation of Microarchitectural Side-Channels with Statistical Model Checking
arxiv.org·14h
📱Bytecode Design
An old Xeon may use a lot of power, but it's not as slow as you might think
xda-developers.com·1d
⏲️Embedded GC
1GHz Renesas RA8T2 Cortex-M85 MCUs feature MRAM and EtherCAT for industrial motor control
cnx-software.com·18h
🔌Microcontrollers
Modular Satellite Bus Self-Diagnostics via Reinforcement Learning and Bayesian Optimization
dev.to·3h·
Discuss: DEV
🎭Program Synthesis
OpenAI and chipmaker AMD sign chip supply partnership for AI infrastructure
independent.co.uk·7h
💾IoT Allocators
Linux will not add support for RISC-V big-endian developmemts/experiments for now.
lore.kernel.org·5d·
Discuss: Hacker News, r/linux
🤖Embedded Go
rblhost: Exploring Rust’s Role in Embedded Development Tools
mcuoneclipse.com·1d
🏗️Cranelift
Mesoscale functional organization of face and body areas in the macaque brain
nature.com·6h
🗺️Region Polymorphism
A Primer on Memory Consistency and Cache Coherence, Second Edition
link.springer.com·1d·
Discuss: r/programming
🧠Memory Models
A digital frequency detector
edn.com·2h
🔍Peephole Optimization
[Q] ARM vs x86 in consumer space in 10 years
forums.anandtech.com·3d
📦Portable Bytecode
Building the Future of Aircon Servicing with C++
airconservicing.org·6h·
Discuss: DEV
📦Monorepos
Podcast EP309: The State of RISC-V and the Upcoming RISC-V Summit with Andrea Gallo
riscv.org·3h
🏷️Memory Tagging