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🔬 RISC-V
Open Hardware, Instruction Sets, CPU Design, SiFive
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112474
posts in
531.1
ms
Discussion - Investigation of Single Thread CPU "
Thoughput/cycle
"
forums.anandtech.com
·
1d
🔢
SIMD
Hardware Co-Design Scaling Laws via
Roofline
Modelling
for On-Device LLMs
arxiv.org
·
1d
🧠
Memory Management
Intel Nova Lake Compute
Tile
Die Sizes Leak Highlighting Massive
L3
Cache Expansion
hothardware.com
·
15h
💻
Computer Hardware
Radxa Cubie
A7S
Integrates
A733
SoC, RISC-V MCU, and LPDDR5 Memory
linuxgizmos.com
·
17m
💻
Computer Hardware
How to think like a computer
scientist
: Learning with C
open.umn.edu
·
3h
·
Discuss:
r/C_Programming
⌨
Programming
STM32F7
- Very high-performance
MCUs
with Cortex-M7
st.com
·
3d
🧠
Memory Management
harishsg993010/tiny-NPU
: opensource NPU for LLM inference (this run
gpt2
)
github.com
·
11h
·
Discuss:
r/LocalLLaMA
🔧
FPGA
Linux 7.0
MM
Changes Bring Some Very Nice Performance
Optimizations
phoronix.com
·
4h
🧠
Memory Management
Universal Intel
Chipset
Device
Updater
2026.02.0008
majorgeeks.com
·
12h
💻
Computer Hardware
First Test of Java on
BeagleBoards
(ARM and
RISC-V
)
dev.to
·
2d
·
Discuss:
DEV
🔩
Assembly
Results from the
Advent
of
FPGA
Challenge
blog.janestreet.com
·
1d
·
Discuss:
Hacker News
🔧
FPGA
[NodeQuality]
DMIT.LAX.AN5.Pro-TINY-自测留档
nodeseek.com
·
1h
🔩
Assembly
We have
outgrown
the
Process
model
sidhion.com
·
17h
·
Discuss:
Hacker News
🖥️
Operating Systems
A
196B
Open Model That Runs Like It’s
11B
: Step-3.5-Flash’s Trick
hackernoon.com
·
5h
🔢
SIMD
Zero State
Architecture
deep
dive
news.ycombinator.com
·
13h
·
Discuss:
Hacker News
⚡
Zig
TileIR
ianbarber.blog
·
1d
·
Discuss:
Hacker News
✨
Shader Programming
Technical "
whitepaper
" for
afl-fuzz
lcamtuf.coredump.cx
·
15h
·
Discuss:
Lobsters
⚡
Zig
Biostar
launches new 16GB
UDIMM
DDR5 memory modules
kitguru.net
·
15h
🧠
Memory Management
(PR)
Alphacool
Intros
Core Distro Plates V.2
techpowerup.com
·
17h
🔩
Assembly
The Linux driver
implementer
’s API guide
kernel.org
·
21h
🖥️
Operating Systems
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