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Hardware Acceleration
⚡ Hardware Acceleration
GPU Computing, Tensor Cores, Specialized Chips, SIMD Instructions
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88
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📦
Batch Embeddings
arxiv.org
·
6d
6 days ago
NeuronFabric: A Software Reference Architecture for
On-Chip
Transformer Training with Local Adam
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Actions for NeuronFabric: A Software Reference Architecture for On-Chip Transformer Training with Local Adam
➕
Sum Types
unsafeperform.io
·
17h
17 hours ago
Retrocomputing with Clash – Haskell for
FPGA
Hardware
Design
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Hacker News
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Actions for Retrocomputing with Clash – Haskell for FPGA Hardware Design
🖥
GPUs
Phoronix
·
4h
4 hours ago
Early AMD GCN GPUs Seeing Improved
GPU
Recovery - Another Valve-Led Linux Improvement
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Actions for Early AMD GCN GPUs Seeing Improved GPU Recovery - Another Valve-Led Linux Improvement
🎯
Vector Search
GitHub
·
2d
2 days ago
Out of Stealth (Kinda)
Covers
uv
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Actions for Out of Stealth (Kinda)
⚡
SIMD Optimization
shnatsel.medium.com
·
2d
2 days ago
Safe
SIMD
in Rust, even on the inside
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Hacker News
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Lobsters
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Actions for Safe SIMD in Rust, even on the inside
🧮
Compute Optimization
The ryg blog (Fabian Giesen)
·
6h
6 hours ago
PivCo-Huffman “merge” operations
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Lobsters
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Actions for PivCo-Huffman “merge” operations
⚡
SIMD Optimization
indianspeedster.github.io
·
5d
5 days ago
Occupancy Math on the AMD MI355X: A From-First-Principles Guide
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Actions for Occupancy Math on the AMD MI355X: A From-First-Principles Guide
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Hardware Security
edacation.github.io
·
1d
1 day ago
Show HN: Web-Based
FPGA
Viewer
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Actions for Show HN: Web-Based FPGA Viewer
⚛️
Physics
milkyway.center
·
21h
21 hours ago
V131 Silicon Photonic
Chip
: Topological Manifold Processor, BER=0, 80ch DWDM
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Actions for V131 Silicon Photonic Chip: Topological Manifold Processor, BER=0, 80ch DWDM
🖥️
Hardware Architecture
SemiWiki
·
4d
4 days ago
RISC-V and AI: The Architecture Shift Is Now
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Actions for RISC-V and AI: The Architecture Shift Is Now
🛠️
Systems Programming
research.colfax-intl.com
·
1d
1 day ago
NVFP4 Blockscaled GEMM on NVIDIA RTX Pro Blackwell GPUs (SM12x)
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Actions for NVFP4 Blockscaled GEMM on NVIDIA RTX Pro Blackwell GPUs (SM12x)
🧮
Compute Optimization
hiraditya.github.io
·
5d
5 days ago
Loop Unrolling in the ML Era
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Actions for Loop Unrolling in the ML Era
🤖
AI
GitHub
·
2d
2 days ago
Show HN: NanoEuler – GPT-2 scale model in pure
C/CUDA
from scratch
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Actions for Show HN: NanoEuler – GPT-2 scale model in pure C/CUDA from scratch
📱
Edge AI Optimization
datavorous.github.io
·
3d
3 days ago
Reverse engineering the Qualcomm
NPU
compiler
Covers
2 stories
See all stories this covers
including
Quick Shell Access from Claude Code
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Actions for Reverse engineering the Qualcomm NPU compiler
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Running
the Guardian
·
1d
1 day ago
Summer running essentials: my nine must-haves to staying cool while training for a half-marathon
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Actions for Summer running essentials: my nine must-haves to staying cool while training for a half-marathon
🛠️
Systems Programming
boolsi.com
·
1d
1 day ago
Enable software developers to compile hotspots into custom
hardware
accelerators
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Hacker News
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Actions for Enable software developers to compile hotspots into custom hardware accelerators
🏭
TSMC
bloomberg.com
·
4d
4 days ago
OT GROUP CEO on Onitsuka Tiger Spinning off from
Asics
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Actions for OT GROUP CEO on Onitsuka Tiger Spinning off from Asics
🛠️
Systems Programming
Phoronix
·
9h
9 hours ago
zlib-rs 0.6.4 Released With Fix For Intel Raptor Lake Crash,
SIMD
Optimizations
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Actions for zlib-rs 0.6.4 Released With Fix For Intel Raptor Lake Crash, SIMD Optimizations
⚡
SIMD Optimization
Sylvain Kerkour
·
2d
2 days ago
Hashing at 130 GB/s with XXH3, Rust and
SIMD
instructions
on AMD Zen 5
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Hacker News
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Actions for Hashing at 130 GB/s with XXH3, Rust and SIMD instructions on AMD Zen 5
⚡
Performance
arxiv.org
·
3d
3 days ago
Performance Analysis and Optimization of 3D Generative Diffusion Models across
GPU
Architectures
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Actions for Performance Analysis and Optimization of 3D Generative Diffusion Models across GPU Architectures
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