Ripple: An LLVM compiler-interpreted API to support SPMD and loop annotat
discourse.llvm.org·13h·
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🏗️Compiler Design
Intel’s E2200 “Mount Morgan” IPU at Hot Chips 2025
chipsandcheese.com·22h·
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💿OS
4-bit Single Board Computer Based on the Intel 4004 Microprocessor
hackaday.com·4h·
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💿OS
Show HN: Implementation and ablation of the Hierarchical Reasoning Model (HRM)
github.com·1d·
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⚡Systems Performance
Weird CPU architectures, the MOV only CPU (2020)
justanotherelectronicsblog.com·2d·
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💿OS
Spiral
spiraldb.com·4h·
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⚡Systems Performance
The 100MHz 6502
e-basteln.de·4h·
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💿OS
Coco – Solving the Expression Problem in Standard OO (Java, C#, Scala, ..)
drops.dagstuhl.de·8h·
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🔍Type Systems
Performance Improvements in .NET 10
devblogs.microsoft.com·1d·
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⚡Systems Performance
MLPerf Inference v5.1 Results Land with New Benchmarks and Record Participation
hpcwire.com·5h·
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⚡Systems Performance
Fundamentals of Wireless Communication
web.stanford.edu·3d·
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🔍Type Systems
Memory Speed Terminology Guide
pugetsystems.com·2d·
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⚡Systems Performance
Generating Website Banners Algorithmically
golfed.xyz·5h·
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🔤Text Algorithms
Phospholipid head govern area per lipid and emergent elasticity of bilayer(2018)
cell.com·21h·
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⚡Systems Performance
Journey to 2-second Inter-node RL Weight Transfer
le.qun.ch·6h·
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⚡Systems Performance
Building a shared world with systems we don't understand–what could go wrong?
syntheticauth.ai·6h·
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🔍Type Systems
An Inline Cache Isn't Just a Cache
mgaudet.ca·22h·
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🚀JIT Compilation
Issue 489
haskellweekly.news·7h·
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🔍Type Systems
Memory-Centric AI: SanDisk's High Bandwidth Flash
sandisk.com·2d·
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⚡Systems Performance
The Rise of Async Programming
braintrust.dev·7h·
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🚀JIT Compilation