Building Yantra: A Visual Workflow Automation Engine
patali.dev·21m·
Discuss: Hacker News
⚡Systems Performance
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AI Chip History Not Only Rhymes but Also Repeat Itself
diblante.com·3h·
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🔌RISC-V
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Chips Need to Chill Out
spectrum.ieee.org·1d·
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🔌RISC-V
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A portable picokernel for async I/O
ryansepassi.com·2d·
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💿OS
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Reflections on Trusting Trust (1984)
web.archive.org·11h·
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💿OS
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A Formulation of Slop: How Optimization Pressure Destroys Meaning
intuitmachine.medium.com·1d·
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🔬PLT
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Challenging the Fastest OSS Workflow Engine
obeli.sk·2d·
Discuss: Lobsters, Hacker News
🔀Concurrency Models
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Incremental Compilation in Recursive‑Descent Parser (Roslyn)
langdev.stackexchange.com·8h·
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🌳Tree-sitter
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Thinking with Types: type-level programming in Haskell
thinkingwithtypes.com·11h·
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🌳Tree-sitter
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Cycle-accurate 6502 emulator as coroutine in Rust
github.com·1d·
Discuss: Lobsters, Hacker News, Hacker News, r/programming, r/rust
🔌RISC-V
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Jackknife Transmittance and MIS Weight Estimation
momentsingraphics.de·1d·
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🧰Developer Ergonomics
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Learning to program "recycles" preexisting F-P pop codes of logical algorithms
jneurosci.org·12h·
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🔬PLT
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Cure – Verification-First Programming for the Beam
cure-lang.org·9h·
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🏗️Compiler Design
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Our newest model: Chandra (OCR)
datalab.to·18h·
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🔤Text Algorithms
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Strix Halo's Memory Subsystem: Tackling iGPU Challenges
chipsandcheese.com·2d·
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⚡Systems Performance
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Ask HN: Do professional photographers need hardware-level image authentication?
news.ycombinator.com·1d·
Discuss: Hacker News
🔌RISC-V
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No Cap, This Memory Slaps: Breaking Through the OLTP Memory Wall
danglingpointers.substack.com·3d·
Discuss: Substack
🔌RISC-V
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Stacking Threads
netmeister.org·4d·
Discuss: Hacker News
🔌RISC-V
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Breakthrough in Bioelectronics: Artificial Neurons Mimic Nature
techlife.blog·8h·
Discuss: Hacker News
🔌RISC-V
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Scala vs. F#
alexn.org·16m·
Discuss: Hacker News
⚙️Language Implementation
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