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🔁 Cache Coherence
Multi-Core, Memory Models, MESI Protocol, CPU Architecture
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74363
posts in
289.7
ms
Lightening
the robotic
scraping
: Insights for a ‘green’ cache from the Software Heritage archive
diff.wikimedia.org
·
5d
🔧
Abseil
WritePolicyBench
: Benchmarking Memory Write Policies under
Byte
Budgets
arxiv.org
·
5d
🌊
Memory Bandwidth
The
Arrival
Protocol:
Waking
the Spark in a New World
write.as
·
3d
📝
Write-Ahead Logging
deepmriprep
: voxel-based
morphometry
preprocessing via deep neural networks
nature.com
·
3d
🤖
TVM
Engineering
Ethereum
's Speed: How we made
Ethrex
20x faster
blog.lambdaclass.com
·
5d
🚀
Performance
A
Comparative
Study of Digital
Memristor-Based
Processing-In-Memory from a Device and Reliability Perspective
arxiv.org
·
4d
🧠
PIM
Hamming
Distance for Hybrid Search in
SQLite
notnotp.com
·
4d
·
Discuss:
r/programming
📋
Columnar Storage
The
Heartbeat
of Tetris 🟥🟥🟥🟥: What a
1x1
Pixel Taught Me About Concurrency
qianarthurwang.substack.com
·
5d
·
Discuss:
r/programming
🧵
Lightweight Threads
Redis/Valkey
Replication
Internals
: The Architecture Behind Zero-Copy Command Propagation
frostzt.com
·
4d
·
Discuss:
Hacker News
,
r/programming
⛓️
Chain Replication
Is Your Machine Learning
Pipeline
as Efficient as it Could Be?
kdnuggets.com
·
3d
📱
Edge AI
Why RAG Failed Us for
SRE
and How We Built Dynamic Memory
Retrieval
Instead
drdroid.io
·
3d
·
Discuss:
Hacker News
🛡️
RAII
Finding the needle in the
logstack
: Reducing LLM context with
TF-IDF
eliseomartelli.it
·
3d
🦙
Ollama
Exclusive-Intel, AMD
notify
customers in China of lengthy
waits
for CPUs
finance.yahoo.com
·
3d
🔢
Intel AMX
Software Architecture and
Philosophical
Anthropology
michaelmangialardi.substack.com
·
3d
·
Discuss:
Substack
🎨
API Design
A free energy landscape analysis of resistance
fluctuations
in a
memristive
device
nature.com
·
3d
🚧
Memory Barriers
Training language models on
TPUs
shouldn't be
scary
dogac.dev
·
4d
·
Discuss:
Hacker News
⚙️
XLA
Scaling
Ultra-Low-Power Edge Intelligence For Smart
Devices
semiengineering.com
·
4d
🔌
Embedded Systems
Show HN: C discrete event SIM w
stackful
coroutines runs 45x faster than
SimPy
github.com
·
6d
·
Discuss:
Hacker News
🔁
Async Runtimes
Energy‑Efficient
Sparse
Coding in
Neuromorphic
Hardware for Autonomous Drones:
freederia.com
·
4d
🧮
Intel MKL-DNN
Modern NVMe SSD meets vintage
PCI
slot in
quirky
experiment — M.2 drive shows storage speeds worth dying for back in the '90s
tomshardware.com
·
4d
💽
NVMe
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