📏 Picolibc - hello · Scour

An agent autonomously builds a 1.5 GHz Linux-capable RISC-V CPU

lesswrong.com·1d

🏗Computer Architecture

AlmaLinux Kitten Gets Its Claws Into RISC-V

fossforce.com·1d

On Securing the Software Development Lifecycle in IoT RISC-V Trusted Execution Environments

arxiv.org·3d

🛡️Intel SGX

NumKong: 2'000 Mixed Precision Kernels For All 🦍

ashvardanian.com·2d·

Discuss: Hacker News

Prompt to tape out: Autonomous AI agent builds 1.5 GHz RISC-V CPU

blog.adafruit.com·6h

💬Prompt Engineering

Less-relevant results

Avaota F2 – Allwinner V861 RISC-V SBC targets AI cameras with PTZ and audio support

cnx-software.com·3d

RISC-V CEO Interview on ISO Standardization, AI Matrix Extensions, Automotive and Edge Compute

armdevices.net·2d

HyperCroc: End-to-End Open-Source RISC-V MCU with a Plug-In Interface for Domain-Specific Accelerators

arxiv.org·6d

⚡Hardware Acceleration

Telink TL322X+ML3228A Launched at Embedded World 2026

eetimes.com·2d

🔌Embedded Systems

read a couple of books about compilers

redplait.blogspot.com·4d·

Discuss: redplait.blogspot.com

🔨Compiler Design

AlmaLinux goes RISC-V: Kitten 10 now available for riscv64

almalinux.org·5d

The First Real RISC-V AI Laptop

semiwiki.com·5d

AlmaLinux OS Kitten 10 Begins Supporting RISC-V

phoronix.com·5d

RED Semiconductor VISC edge AI matrix math IP, RISC-V coprocessor for vision, crypto

armdevices.net·6d

⚡Hardware Acceleration

Creating my first malloc

dev.to·6h·

Discuss: DEV

💾Memory Allocators

Ask Slashdot: What's the Best All-Purpose RISC-V System on a Chip Family?

slashdot.org·6d

Two Studies in Compiler Optimisations

hmpcabral.com·4h·

Discuss: Hacker News

🔧LLVM IR Optimization

Writing an operating system kernel from scratch

popovicu.com·6d·

Discuss: r/coding, r/programming

⚙️Systems Programming

John H. Baldwin

baldwin.cx·6d

🏗️Cranelift

Using Go Dynamic and Static Shared libraries in C/C++ Programs

xuri.me·1d·

Discuss: Lobsters

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