LLMs on a Shoestring: The Dynamic Cache Advantage by Arvind Sundararajan
dev.to·1d·
Discuss: DEV
💨Cache Optimization
Portable computer with hologram- By JayJoeberg
hackster.io·1h
📟Terminal Physics
AI hardware reimagined for lower energy use
news.cornell.edu·4h·
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🔧Hardware Verification
A Breadboard Computer in Three Chips
hackaday.com·3d
Homebrew CPUs
Which cores does Visual Look Up use?
eclecticlight.co·9h
🖥️Terminal Renaissance
Network Storage and Scaling Characteristics of a Distributed Filesystem
maknee.github.io·21m·
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Cache Coherence
The 6502 CPU’s odd debut
dfarq.homeip.net·5h
🧲RISC-V Archaeology
Condor Technology To Fly “Cuzco” RISC-V CPU Into The Datacenter
nextplatform.com·23h·
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🧩RISC-V
Semantic Dictionary Encoding
falvotech.com·1d·
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🌀Brotli Dictionary
Machine Scheduler in LLVM
myhsu.xyz·8h·
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⚙️RISC-V Microcode
Application of Machine Learning for Correcting Defect-induced Neuromorphic Circuit Inference Errors
arxiv.org·12h
🔧Hardware Verification
Microservices vs Monolith: A Complete Architecture Guide for Modern Software Development
blog.devops.dev·1d
🖥️Self-hosted Infrastructure
Dolphin Progress Report: Release 2509
dolphin-emu.org·12h·
🎯Emulator Accuracy
Back from Open Source Summit Europe 2025: talks from Bootlin
bootlin.com·1d
⚙️Operating System Design
Disaggregated Inference at Scale with PyTorch and VLLM
pytorch.org·2d·
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LZ4 Streaming
So you have your data, but how does it relate to the physical world?
blog.mapped.com·11h·
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🌊Stream Processing
Safepoints and Fil-C
fil-c.org·11h·
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Hardware Transactional Memory
The future of microoptimization
goldenstack.net·3d·
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🧮Compute Optimization