Basic facts about GPUs
damek.github.io·5h·
Discuss: Lobsters, Hacker News
🖥️Hardware Architecture
Rust SIMD Programming: Accelerate Performance with Vectorized Instructions and Parallel Processing
dev.to·2d·
Discuss: DEV
🚀SIMD Parsing
Coping with Complexity
slott56.github.io·23h
🔗Concatenative Programming
ARM-software/CMSIS-DSP
github.com·2d
🦾ARM Assembly
TPU Deep Dive
henryhmko.github.io·8h·
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🖥️Hardware Architecture
Discover C++26’s compile-time reflection
lemire.me·9h·
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🦀Rust Macros
How to write a (software) 3D polygon pipeline (2000)
cbloom.com·2d·
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⟷Bidirectional Programming
Understanding Application Performance with Roofline Modeling
towardsdatascience.com·1d
📊Performance Profiling
Revisiting Knuth’s “Premature Optimization” Paper
probablydance.com·2d·
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🚀Compiler Optimizations
Deep Dive into SVT-AV1's Evolution (Part 1)
wiki.x266.mov·1d·
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🎬AV1 Encoding
How to Compile a Large Language Model (LLM) to RISC-V
siliscale.com·18h·
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🧩RISC-V Assembly
Lights-Out C64: Parity With the NES
bumbershootsoft.wordpress.com·1d
📼Retro Games
Python Fundamentals: arrays
dev.to·11h·
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📊APL Heritage
Memory Safety in Web Rust System Zero Cost Secure（1750570224424500）
dev.to·5h·
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🦀Rust Borrowing
Microcontrollers: Getting Started
youtube.com·1d
🔌Microcontrollers
Memory Safety in Web Rust System Zero Cost Secure（1750545683665600）
dev.to·12h·
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🦀Rust Borrowing
Acore-CIM: build accurate and reliable mixed-signal CIM cores with RISC-V controlled self-calibration
arxiv.org·3d
🔧Hardware Verification
Show HN: Cartesian vs. Sparse Merkle Trees – faster treap-based design in Go
rafaelescrich.medium.com·1d·
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🌳Archive Merkle Trees
So you want to serialize some DER?
alexgaynor.net·2d·
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🔒Type Safety
Memory Safety in Web Rust System Zero Cost Secure（1750525775079000）
dev.to·18h·
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🦀Rust Borrowing