Browse all 512 micro-instructions. Hover the Binary, Move, and Action columns for decoded details and color-coded bit fields.
Source: Andrew Jenner’s 8086 microcode disassembly, based on Ken Shirriff’s die photo.
Author: @nand2mario — December 2025
The Intel 8086 executes its machine instructions through microcode. This viewer presents an interactive listing of all 512 micro-instructions in the control ROM. Each micro-instruction is 21 bits wide, addressed by a 13-bit micro-address, and split into two parts: a Move field, which moves data between internal registers, and an Action field, which controls ALU operations, memory cycles, branching, and other control signals.
The microcode address is composed of two fields: the upper 9 bits AR and…
Browse all 512 micro-instructions. Hover the Binary, Move, and Action columns for decoded details and color-coded bit fields.
Source: Andrew Jenner’s 8086 microcode disassembly, based on Ken Shirriff’s die photo.
Author: @nand2mario — December 2025
The Intel 8086 executes its machine instructions through microcode. This viewer presents an interactive listing of all 512 micro-instructions in the control ROM. Each micro-instruction is 21 bits wide, addressed by a 13-bit micro-address, and split into two parts: a Move field, which moves data between internal registers, and an Action field, which controls ALU operations, memory cycles, branching, and other control signals.
The microcode address is composed of two fields: the upper 9 bits AR and the lower 4 bits CR. In the viewer, the opcode/address field is shown as AR.CR[3:2] (binary). When the opcode is empty, the next micro-instruction follows sequentially. For short jumps (type 0 actions), AR remains unchanged and a 4-bit target is loaded into CR; hovering the short-jump value highlights the target row. For long jumps (types 5 and 7), a separate Translation ROM maps a 4-bit destination code to a full 13-bit address, and both AR and CR are replaced with this translated value.