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⚙️ RISC-V Microcode

Instruction Decoding, Pipeline Control, Hazard Handling, Control Units

CPU Branch Prediction – Earliest Forms of Machine Learning
medium.com·12h·
Discuss: Hacker News
⚡CPU Microarchitecture
BW21-CBV-Kit——Home Video Monitoring and Playback System
hackster.io·22h
🎬Video Codecs
Real-Time Anomaly Detection in Friction Stir Welding using Multi-Modal Sensor Fusion and Bayesian Inference
dev.to·6h·
Discuss: DEV
📄Document Digitization
Emulating aarch64 in software using JIT compilation and Rust
pitsidianak.is·1d·
Discuss: Lobsters, Hacker News, Hacker News, r/programming, r/rust
🦾ARM Assembly
Why are CUDA kernels hard to optimize?
johndcook.com·5h
🧮Compute Optimization
Athos Silicon: SoC with redundant UCIe chiplets for autonomous driving and more
heise.de·1d
⚡Nordic Processors
How to Slow Down a Program? And Why it Can Be Useful.
stefan-marr.de·18h·
Discuss: Lobsters, Hacker News, r/programming
🚀Compiler Optimizations
Io_uring by Example
unixism.net·6h·
Discuss: Hacker News
🐚Shell Calculus
State of the art for reducing executable size with optimized program
discourse.llvm.org·17h·
Discuss: Lobsters, Hacker News, r/programming
🔗Static Linking
AprilRobotics/apriltag
github.com·2h
🤖Advanced OCR
Using thinkfan for fan control on Lenovo (Linux) laptops
kevinboone.me·1d
⚡Homebrew CPUs
The AVX-512 thread
forums.anandtech.com·1d
🧲RISC-V Archaeology
Satellites, Linux trays, and laundry: Hack Week 2025 at Tailscale
tailscale.com·12h
🖥️Modern Terminals
Minisforum BD790i X3D & Proxmox Passthrough
forum.proxmox.com·14h·
Discuss: r/homelab
🔌Operating system internals
RTL generation for custom CPU Mrav
popovicu.com·4d
⚙️Modern Assembly
Pushing Blocks without Fixed Blocks via Checkable Gizmos: Push-1 is PSPACE-Complete
arxiv.org·27m
🧮SMT Solvers
Sony’s Triple Seven
leadedsolder.com·2d
🕹️Retro Gaming
Future Research in XP Modeling: A Call for Self-Learning Models
hackernoon.com·12h
⚙️Operating System Design
Debugging the Instant Macropad
hackaday.com·2d
📺VT100
A tiny firm wants to slash energy consumption by changing the way CPUs are designed - and it is even planning a new high performance server chip
techradar.com·10h
🖥️Hardware Architecture
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