Abstract

Energy consumption minimization is one of the essential requirements in scheduling tasks in heterogeneous multicore embedded systems in which Dynamic Voltage and Frequency Scaling (DVFS) plays a significant role. Using techniques like DVFS helps to achieve better task scheduling, but the problem of task scheduling becomes an NP-Hard problem. To address these problems, our work proposes a novel approach to assigning frequencies to each task and allocating tasks to various cores in a multicore processor. Our method introduces a less complex yet energy-efficient frequency assignment and task allocation strategy. The Frequency Assignment (FA) algorithm uses the binary search for frequency selection, which reduces the computational complexity to O(N⋅logL), where N is the number of tasks and L represents the frequency levels. This guarantees that the frequency is allocated to each task optimally and consumes less energy. For task allocation, we proposed a Task Assignment (TA) algorithm based on Rank and Earliest Finish Time (EFT), which ensures that the tasks are assigned to available processor cores to minimize the overall execution time of the processor. This strategy minimizes energy consumption, distributes the workload evenly, and efficiently uses the available processing power. We compare our solution with other energy-efficient algorithms to evaluate performance in various applications like Gaussian Elimination (GE) and random task graph. Our numerical results demonstrate that the proposed scheduling algorithms perform significantly higher than the existing energy-efficient algorithms in terms of energy savings, task execution efficiency, and reduced computation complexity. The proposed work is implemented in Verilog on the Zynq Ultrascale＋ MPSoC ZCU106 Evaluation Kit FPGA platform, and its performance has been validated.

Introduction

The growing complexity of modern computing applications has created a continuous demand for higher performance and energy efficiency. To meet these demands, designers are increasingly depending on heterogeneous architectures that integrate multiple processing elements with diverse capabilities. The ever-increasing demand for devices with higher processing power has increased the need for heterogeneous systems with NoCs to ensure that bottlenecks do not affect overall performance. To allow for efficient utilization of processing power, it is essential that task scheduling is done effectively. It is also important that task scheduling remains energy efficient, as the saved energy can be utilized for other applications within the NoC. By scheduling tasks in an energy-efficient manner in a NoC, it is possible to achieve the higher processing performance that users demand. However, when running on actual hardware, several existing methods still struggle to balance energy efficiency and real-time performance.

Significant research has been conducted in this area, and the primary method used is DVFS [1], [2]. DVFS enables the processor to adjust its power and operating speed based on the workload, which helps conserve energy without sacrificing system performance. State-of-the-art works propose task scheduling on heterogeneous systems considering the optimization of various performance metrics [3], [4]. By maximizing or minimizing a specific metric, task scheduling that best suits a given application is achieved. Despite these advancements, many challenges remain in achieving both energy efficiency and real-time performance in practical systems. Each of these approaches still faces certain drawbacks. The main drawback of ILP is that as the problem size (number of tasks, processors, and constraints) increases, it may become computationally infeasible to find an optimal solution. Greedy approaches are fast but can lead to poor global decisions. Moreover, most existing solutions are either too complex to run efficiently or fail to consider dynamic workloads encountered in real-world environments, which can result in subpar overall performance.

In real-time embedded systems, where tasks must meet strict deadlines, energy-efficient scheduling is essential as it helps reduce power consumption, especially in battery-powered systems and lowers operational costs in larger deployments. Additionally, it enhances system reliability and contributes to environmental sustainability by minimizing overall energy consumption. Building on the limitations identified in existing methods, there remains a need for a simple yet effective approach that balances energy efficiency with computational feasibility. To address this, our work proposes a simple and efficient technique that combines frequency selection (using a binary search-based approach) and task mapping (based on rank and earliest finish time). This method reduces computational complexity and improves energy efficiency, making it well-suited for real-time embedded systems.

The main contributions of this paper are as follows:

• 1.

For the frequency allocation problem, we use a novel binary search approach in the FA Algorithm. By using binary search, we reduce the complexity of frequency allocation to O(N⋅logL), where N is the number of tasks and L is the number of frequency levels.

• 2.

We propose a task assignment strategy – the TA Algorithm – that uses rank-based prioritization to allocate tasks to processors based on the minimum Earliest Finish Time (EFT).

• 3.

The proposed work is simulated using Verilog in AMD Vivado 2024.2, and the results are compared with state-of-the-art works like ISAECC, GDES, and Greedy algorithms. The algorithms are evaluated based on energy consumption at fixed and variable deadlines, schedule length, and processor assignments.

• 4.

The proposed algorithm is also verified on the Zynq Ultrascale+ MPSoC board for applications like Gaussian Elimination (GE) and random task graphs, to ensure that it consumes the least energy compared to the other three algorithms.

The article is organized as follows. Section 2 briefly reviewed related work on energy-efficient task scheduling in heterogeneous multicore embedded systems. The preliminaries and problem description of the paper are given in Section 3. The proposed strategy is explained in Section 4. Section 5 presents experimental simulation results. Hardware implementation is discussed in Section 6. Some limitations of the paper is discussed in Section 7. Finally, Sections 8 Conclusions, 9 Future works conclude the paper with conclusions and Future works.

Section snippets

Related works

Recently, much attention has been given to energy-efficient task scheduling in embedded systems, especially in terms of frequency allocation and task scheduling. Biao Hu et al. proposed a task assignment algorithm that uses DVFS to schedule the task optimally for different processors [5]. In addition, it employs a task migration algorithm, which focuses on migrating the tasks in a particular processor to some other processor so that the processor can be deactivated to conserve energy. However,

Preliminaries and problem formulation

Table 2 tabulates the important notations, and their definitions used in this paper.

Proposed work

The proposed algorithm is split into two parts. First, the Frequency Assignment is done, followed by Task Assignment and Scheduling. The frequency assignment algorithm uses binary search to go through the energy consumption of different frequencies. Then, once a minimum energy for a task is found, it is chosen as the frequency for that task. This process is repeated until all tasks are assigned frequencies. After every task, the total energy (Etotal) is checked for Energy constraint (Ebudget).

Simulation results

The performance of the proposed FA and TA algorithms has been evaluated in the AMD Vivado 2024.2 simulator using Verilog. A set of voltage and frequency pairs has been provided for the task’s operation, from which the optimal V/F pair is selected using the FA algorithm. The other inputs include Ebudget, Execution cycles for each task, Deadlines, Critical path tasks, Communication cost, execution time of each task, etc. After providing all the necessary inputs, the algorithm has been simulated,

Hardware implementation

The proposed algorithm has been implemented in the Zynq Ultrascale+ MPSoC ZCU106 Evaluation Kit FPGA platform to validate the working of the algorithm. The 16 nm FinFET Zynq® UltraScale+™ MPSoC’s ZU7EV silicon part and package serve as the foundation for the ZCU106, a general-purpose evaluation board for rapid prototyping. By combining a dual-core Arm Cortex-R5F real-time processor with a quad-core Arm® Cortex™-A53 processing system (PS), the ZU7EV device provides a good degree of heterogeneous

Discussions

• •

One of the main limitations of our study is that, even though we say an optimal solution can be found using the algorithm, it finds a near-optimal solution as the task scheduling problem is NP- Hard. Finding the global optimum solution using binary search may not be entirely possible.

• •

The current implementation’s latency and energy overheads associated with voltage/frequency transitions are not explicitly modeled. To simplify the scheduling analysis, we assumed frequency and voltage changes to

Conclusions

In this study, we have proposed an energy-efficient task-scheduling algorithm for heterogeneous embedded platforms. The FA algorithm utilizes binary search and reduces the complexity of frequency assignment to O(N⋅logL), ensuring scalability across various frequency levels and adapting well to systems with multiple processors. The TA algorithm uses a rank and Earliest Finish Time (EFT) based task allocation, which, along with the FA algorithm, helps to reduce energy consumption during task

Future works

• 1.

Incorporate the energy overheads of changing voltage/frequency levels into the simulation. Accounting for these overheads will enable a more accurate evaluation of metrics like energy and runtime.

• 2.

Extend the algorithm to handle dynamic task sets or integrate predictive models to adapt frequency and task mapping decisions on the fly.

• 3.

While our method is specifically designed for embedded systems, we believe it can be adapted for cloud-based heterogeneous task scheduling with some thoughtful

Acknowledgment

All authors have read and approved the final version of the manuscript and have agreed to its submission to Computers and Electrical Engineering.

Declaration of competing interest

We do not have any conflicts about publication of the paper.

References (23)

• A. Mishra* et al.*

Energy efficient voltage scheduling for multi-core processors with software controlled dynamic voltage scaling

Appl Math Model

(2014)

• Y. Li* et al.*

Energy-aware scheduling on heterogeneous multi-core systems with guaranteed probability

J Parallel Distrib Comput

(2017)

• H. Xu* et al.*

Energy-efficient scheduling with reliability guarantee in embedded real-time systems

Sustain Comput Inf Syst

(2018)

• Z. Tang* et al.*

An energy-efficient task scheduling algorithm in DVFS-enabled cloud environment

J Grid Comput

(2016)

• G. Xie* et al.*

A survey of low-energy parallel scheduling algorithms

IEEE Trans Sustain Comput

(2022)

• J. Niu* et al.*

Energy efficient task assignment with guaranteed probability satisfying timing constraints for embedded systems

IEEE Trans Parallel Distrib Syst

(2014)

• Seyed Mahyar Hosseini* et al.*

Multi-objective discrete cuckoo search algorithm for optimization of bag-of-tasks scheduling in fog computing environment

Comput Electr Eng

(2024)

• B. Hu* et al.*

Online energy-efficient scheduling of DAG tasks on heterogeneous embedded platforms

J Syst Archit

(2023)

• E. Antolak* et al.*

Energy-efficient task scheduling in design of multithread time predictable real-time systems

IEEE Access

(2021)

• K. Huang* et al.*

Task-level aware scheduling of energy-constrained applications on heterogeneous multi-core system

Electronics

(2020)

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