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🔁 Cache Coherence
Multi-Core, Memory Models, MESI Protocol, CPU Architecture
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203814
posts in
12.3
ms
CPU Cache
Coherence
in Java
Concurrency
tutorials.jenkov.com
·
1d
⚡
Concurrency
Mitigating the Memory
Bottleneck
with Machine Learning-Driven and Data-Aware
Microarchitectural
Techniques
arxiv.org
·
19h
📐
Data-Oriented Design
toloco/warp
_cache: Thread-safe Python caching decorator powered by a Rust extension. Implements SIEVE eviction for scan-resistant, near-optimal hit rates with zero-cost locking under the GIL — entire cache lookup in a single Rust __call__, no Python wrapper overhead. 16–23M ops/s single-threaded, 25× faster than
cachetools
, with cross-process shared memory support.
github.com
·
2d
·
Discuss:
Hacker News
🐹
Go Runtime
An open
shared
memory
protocol
for multi-agent AI
akashikprotocol.com
·
10h
·
Discuss:
Hacker News
🌐
Distributed Systems
Last-level cache has become a critical
SoC
design
element
edn.com
·
4d
🏗️
Computer Architecture
The
KV
Cache: The
Invisible
Engine Behind Every LLM Response
pub.towardsai.net
·
1d
📦
CPU Caches
Laws for
Communicating
Parallel
Processes
dspace.mit.edu
·
19m
⚡
Concurrency
Enabling
Seamless
Monitoring, Test, And Repair In Multi-Die Designs
semiengineering.com
·
16h
📐
Data-Oriented Design
Everspin
introduces a new
MRAM
code and data unified memory for embedded systems
mram-info.com
·
11h
📐
Data-Oriented Design
Info -
LPDDR6
@ Q3-2025: Mother of All CPU
Upgrades
forums.anandtech.com
·
11h
🏗️
Computer Architecture
Cacheman
: A Comprehensive Last-Level Cache Management System for
Multi-tenant
Clouds
danglingpointers.substack.com
·
11h
·
Discuss:
Substack
📦
CPU Caches
Using
directx
shared surfaces as a kernel
IPC
channel
afpereira.me
·
23h
·
Discuss:
Hacker News
🚀
Kernel Bypass
Beyond the Hype:
Architecting
Scalable Low-Code Platforms for Enterprise
Ecosystems
dev.to
·
3h
·
Discuss:
DEV
💾
Storage Engines
In-memory Data Management
Caching
Tools: A Guide to the Best
Options
akamai.com
·
1d
🗄️
Database Internals
Concurrent Systems Need Both
Sequences
And
Serializers
hdl.handle.net
·
19m
⚡
Concurrency
AI on a Budget:
Recompiling
Llama.cpp for Qwen3.5 Inference on an HP
Z440
jeanbaptistefleury.neocities.org
·
15h
·
Discuss:
Hacker News
⚡
Hardware Acceleration
DDR4
Sdram
– Initialization, Training and Calibration
systemverilog.io
·
17h
·
Discuss:
Lobsters
,
Hacker News
📐
Data-Oriented Design
Intel’s
Heracles
Chip
Speeds
Up Encrypted Computing
spectrum.ieee.org
·
10h
·
Discuss:
Hacker News
,
r/hardware
,
r/technews
⚡
Hardware Acceleration
How I Built a
Persistent
Memory Layer for AI Coding
Assistants
Using MCP
dev.to
·
4h
·
Discuss:
DEV
🗄️
Database Internals
timw4mail/rustid
: A CLI Utility for viewing x86 CPU info
github.com
·
10h
·
Discuss:
Hacker News
🔲
CPU Architecture
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