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Computer Architecture
🏗️ Computer Architecture
CPU, instruction set, cache, microarchitecture, hardware
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48
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ms
Apple Chip
Architecture
from 1977 to 2026
🔩
Internals
Content type:
News
Content type:
Blog
blog.jacobstechtavern.com
·
1d
1 day ago
Actions for Apple Chip Architecture from 1977 to 2026
Elasticsearch simdvec deep-dive: Walking the
memory
tightrope to 2x better vector throughput
⚡
Performance
Content type:
Blog
elastic.co
·
5d
5 days ago
Actions for Elasticsearch simdvec deep-dive: Walking the memory tightrope to 2x better vector throughput
The Tick-Tock AI Development Cycle.
🔩
Internals
wilsoniumite.com
·
3h
3 hours ago
Actions for The Tick-Tock AI Development Cycle.
Arithmetic Packing on Wide Integer
Datapaths
in DSP Primitives of Modern FPGA Devices
⚙️
Compilers
Content type:
Academic
arxiv.org
·
15h
15 hours ago
Actions for Arithmetic Packing on Wide Integer Datapaths in DSP Primitives of Modern FPGA Devices
The Return of Rigorous Full-System Timing Simulation
📊
Profiling Tools
sigarch.org
·
2d
2 days ago
·
Hacker News
Actions for The Return of Rigorous Full-System Timing Simulation
Beyond the
Memory
Wall: The
CPU
Was Helping You All Along
⚡
Performance
Content type:
Blog
prawns.dev
·
4d
4 days ago
·
Hacker News
Actions for Beyond the Memory Wall: The CPU Was Helping You All Along
Why x86 Zeroes a Register With `xor eax, eax`
⚙️
LLVM
Content type:
Blog
debasishg.github.io
·
2d
2 days ago
Actions for Why x86 Zeroes a Register With `xor eax, eax`
Building a MIPS emulator with Zig to replace MARS and QtSpim
🖥️
Systems Programming
ziggit.dev
·
14h
14 hours ago
Actions for Building a MIPS emulator with Zig to replace MARS and QtSpim
Intel 8086, the First x86 chip, Enters its 50th Year in 2027
🖥️
Systems Programming
techpowerup.com
·
1d
1 day ago
Actions for Intel 8086, the First x86 chip, Enters its 50th Year in 2027
How much do amd64
microarchitecture
levels help in Go?
⚡
Performance
Content type:
Blog
lemire.me
·
3d
3 days ago
·
Lobsters
,
Hacker News
,
r/golang
Actions for How much do amd64 microarchitecture levels help in Go?
Sequential hardness of a MUL-XOR-shift permutation: open questions
⚙️
Compilers
Content type:
Code
github.com
·
1d
1 day ago
·
r/crypto
Actions for Sequential hardness of a MUL-XOR-shift permutation: open questions
How Will the AI IC Market Evolve Amid Rising Artificial Intelligence Adoption Through 2034?
💻
Software Engineering
Content type:
Blog
semiconinsights.blogspot.com
·
9h
9 hours ago
Actions for How Will the AI IC Market Evolve Amid Rising Artificial Intelligence Adoption Through 2034?
From Database and Virtualized Workloads to Backup: Dell PowerEdge R4715 and R5715 for SMB Realities
⚡
Performance
storagereview.com
·
5d
5 days ago
Actions for From Database and Virtualized Workloads to Backup: Dell PowerEdge R4715 and R5715 for SMB Realities
Fractal OS Lets Security Researchers See What Their CPUs Really Do
⚡
Performance
Content type:
News
spectrum.ieee.org
·
1d
1 day ago
Actions for Fractal OS Lets Security Researchers See What Their CPUs Really Do
uiCA: Accurate Throughput
Prediction
of Basic Blocks on Recent Intel
Microarchitectures
⚡
Performance
Content type:
Academic
arxiv.org
·
20h
20 hours ago
·
Hacker News
Actions for uiCA: Accurate Throughput Prediction of Basic Blocks on Recent Intel Microarchitectures
What Arm-based innovations happened in May 2026?
🔩
Internals
Content type:
Blog
newsroom.arm.com
·
5d
5 days ago
Actions for What Arm-based innovations happened in May 2026?
Exploiting GPU Tensor Cores from Java using Babylon [Juan Fumero]
🔩
Internals
openjdk.org
·
1d
1 day ago
·
r/java
Actions for Exploiting GPU Tensor Cores from Java using Babylon [Juan Fumero]
Founding Engineer - FPGA, RTL, & ASIC
Architect
at Zettascale
🖥️
Systems Programming
ycombinator.com
·
6d
6 days ago
·
Hacker News
Actions for Founding Engineer - FPGA, RTL, & ASIC Architect at Zettascale
Two Leaps to 1000 Tokens/s on a 1T-Parameter Model: On Inference Systems, Execution Boundaries, and
Co-Design
⚡
Performance
Content type:
Blog
tilert.ai
·
2d
2 days ago
·
Hacker News
Actions for Two Leaps to 1000 Tokens/s on a 1T-Parameter Model: On Inference Systems, Execution Boundaries, and Co-Design
The Inference Alpha: Maximizing Frontier Models on AMD
⚡
Performance
Content type:
Blog
digitalocean.com
·
4h
4 hours ago
Actions for The Inference Alpha: Maximizing Frontier Models on AMD
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