🔮 Speculative Execution - abnv · Scour

The Non-Predictability of Mispredicted Branches using Timing Information

arxiv.org·1d

🔮CPU Branch Prediction

SHADOW: Simultaneous Multi-Threading Architecture with Asymmetric Threads

danglingpointers.substack.com·1d·

Discuss: Substack

🤝Cooperative Threading

A Novel Side-channel Attack That Utilizes Memory Re-orderings (U. of Washington, Duke, UCSC et al.)

semiengineering.com·11h

📏Linear Memory

MLflow vs Kubeflow vs Airflow: Choosing the Right MLOps Tool for Real-World Production Systems

pub.towardsai.net

·2d

🌪️V8 TurboFan

AMD Software : Adrenalin Edition 26.1.1

forums.anandtech.com·13h

Streamlining CUB with a Single-Call API

developer.nvidia.com·8h

⏲️Embedded GC

From Chaos to signal: Taming high-frequency OS events in Go

dev.to·1d·

Discuss: DEV

Exploring Performance-Productivity Trade-offs in AMT Runtimes: A Task Bench Study of Itoyori, ItoyoriFBC, HPX, and MPI

arxiv.org·1h

🧠Memory Hierarchy

One part of me wonders whether this would’ve been caught earlier if I spent some more time analizing the possible approaches for this refactor. Honestl...

lmika.org·1h

🧪Compiler Testing

AI Systems Performance Engineering

github.com·5h·

Discuss: Hacker News

Intel to Discontinue Select 12th Gen "Alder Lake-S" & 4th Gen Xeon "Sapphire Rapids" CPUs

techpowerup.com·11h

🏗️CPU Architecture

One ISA, Infinite Use Cases: RISC-V and the Road to Workload-Specific Silicon

riscv.org·10h

Show HN: BackBuild – A framework for sequencing complex software delivery

arcaned.co·18h·

Discuss: Hacker News

🔄Incremental Compilation

ANN v3: 200ms p99 query latency over 100 billion vectors

turbopuffer.com·1d·

Discuss: Hacker News

⚡Cache-Aware Algorithms

Scalable Adaptive Memory Compiler Optimization via Multi-Objective Evolutionary Algorithms

dev.to·1d·

Discuss: DEV

🧠Memory Hierarchy

RUSTSEC-2026-0004: triton-vm: Triton VM Soundness Vulnerability due to Improper Sampling of Randomness

rustsec.org·18h

⚙️TOML Parsers

The Story on ISPC (Intel SPMD Program Compiler)

pharr.org·1d·

Discuss: Hacker News

🔀SIMD Programming

Setting Up A Cluster of Tiny PCs For Parallel Computing - A Note To Myself

kenkoonwong.com·10h·

Discuss: Hacker News

🔀SIMD Programming

Adjusting One Line Of Linux Code Yields 5x Wakeup Latency Reduction For Modern Xeon CPUs

phoronix.com·18h

⚡Instruction Fusion

Heaps do lie: debugging a memory leak in vLLM.

mistral.ai·14h·

Discuss: Hacker News

📊Memory Profilers

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