🔄 Cache Coherence - emschwartz · Scour

When Hidden States Drift: Can KV Caches Rescue Long-Range Speculative Decoding? 🧠LLM Inference

GICC: A High-Performance Runtime for GPU-Initiated Communication and Coordination in Modern HPC Systems ⚡Glommio

No Tile Left Behind: Multiprogramming for Surface-Code Architectures 🖥️Hardware Architecture

AMMA: A Multi-Chiplet Memory-Centric Architecture for Low-Latency 1M Context Attention Serving ⚡Hardware Acceleration

Stochastic KV Routing: Enabling Adaptive Depth-Wise Cache Sharing 🧠Memory Hierarchy Design

MPI Malleability Validation under Replayed Real-World HPC Conditions ⚡Glommio

DUAL-BLADE: Dual-Path NVMe-Direct KV-Cache Offloading for Edge LLM Inference 🏗️LLM Infrastructure

Branch Landing: Bloom Filter-Based Source Authorization for Forward-Edge CFI on RISC-V 💉Prompt Injection

Rethinking KV Cache Eviction via a Unified Information-Theoretic Objective 💾Prompt Caching

SimdQuickHeap: The QuickHeap Reconsidered ⚡Vectorized Execution

Microarchitectural Co-Optimization for Sustained Throughput of RISC-V Multi-Lane Chaining Vector Processors 🖥️Hardware Architecture

Architectural Isolation as a Timing Safety Primitive for Edge AI Medical Devices: Controlled Experimental Evidence on a Shared-Silicon Platform ⚙️Mechanical Sympathy

DepthKV: Layer-Dependent KV Cache Pruning for Long-Context LLM Inference 🧠LLM Inference

D\'ej\`a Vu Packing: Optimizing FPGA Logic Clustering Runtime via Pattern Memoization ⚙️Mechanical Sympathy

AHASD: Asynchronous Heterogeneous Architecture for LLM Adaptive Drafting Speculative Decoding on Mobile Devices 🧠LLM Inference

A comprehensive evaluation of spatial co-execution on GPUs using MPS and MIG technologies ⚡Hardware Acceleration

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