⚙️ Mechanical Sympathy - emschwartz · Scour

No Tile Left Behind: Multiprogramming for Surface-Code Architectures 🖥️Hardware Architecture

Solving Clock Signal Integrity And Jitter Issues 🔄Cache Coherence

semiengineering.com·3d

Stochastic KV Routing: Enabling Adaptive Depth-Wise Cache Sharing 🧠Memory Hierarchy Design

Evaluating CUDA Tile for AI Workloads on Hopper and Blackwell GPUs ⚡Hardware Acceleration

arxiv.org·5d·Hacker News

Architectural Isolation as a Timing Safety Primitive for Edge AI Medical Devices: Controlled Experimental Evidence on a Shared-Silicon Platform 🖥️Hardware Architecture

A comprehensive evaluation of spatial co-execution on GPUs using MPS and MIG technologies ⚡Hardware Acceleration

CacheFlow: Efficient LLM Serving with 3D-Parallel KV Cache Restoration 🔄Cache Coherence

FlowPlace: Flow Matching for Chip Placement 🔬Chip Fabrication

Hardware Generation and Exploration of Lookup Table-Based Accelerators for 1.58-bit LLM Inference ⚡Hardware Acceleration

Exploiting pre-optimized kernels with polyhedral transformations for CGRA compilation 🧮Compute Optimization

Tessera: Secure, Near-Line-Rate Weight Streaming for UMA Edge Accelerators ⚡Hardware Acceleration

TetrisG-SDK: Efficient Convolutional Layer Mapping with Adaptive Windows and Grouped Convolutions for Fast In-Memory Computing 📦Batch Embeddings

Rethinking KV Cache Eviction via a Unified Information-Theoretic Objective 💾Prompt Caching

Efficient, VRAM-Constrained xLM Inference on Clients 🏗️LLM Infrastructure

SimdQuickHeap: The QuickHeap Reconsidered ⚡Vectorized Execution

MEMCoder: Multi-dimensional Evolving Memory for Private-Library-Oriented Code Generation 🔄Cache Coherence

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