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💻 CPU Architecture
Instruction Sets, Pipelining, Cache, Microarchitecture
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104705
posts in
638.0
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A Unified Hardware Architecture for
Stateful
and
Stateless
Hash-Based Key/Signature Generations
eprint.iacr.org
·
5d
#️⃣
Perfect Hashing
Core System
falchion.bearblog.dev
·
5d
🔐
Capability Systems
Designing
energy-efficient AI chips: Why power must be an early
consideration
edn.com
·
5d
🔁
Cache Coherence
LLM Inference
Benchmarking
-
Measure
What Matters
digitalocean.com
·
4d
🚀
Performance
BIOS
updates are the most
underrated
PC upgrade nobody checks
xda-developers.com
·
6d
📊
Intel PMU
CPU scaling with
DLSS
— investigating CPU performance in the age of
upscaling
tomshardware.com
·
4d
⚡
Hardware Acceleration
Intel XeSS 3
MFG
mod triples Arc
A380
triples performance in Cyberpunk 2077 — supercharged 6GB GPU pumps out 140 FPS at 1080p on low preset
tomshardware.com
·
3d
⚡
Hardware Acceleration
Modern
Trends
In
Floating-Point
semiengineering.com
·
5d
🛣️
Highway
The Launch of
RISC-V
Now! A New
Chapter
in Open Computing
semiwiki.com
·
6d
⚡
RISC-V
ProgrammerKR/ProXPL
: ProX Programming Language (
ProXPL
) is a modern, Indian-origin programming language designed for speed, simplicity, and professional-grade development. It combines Python-like readability with C-level performance, focusing on clean syntax, scalable systems, and a growing native ecosystem.
github.com
·
3d
·
Discuss:
DEV
📦
uv
Piece of
CAKE
: Adaptive Execution Engines via
Microsecond-Scale
Learning
arxiv.org
·
6d
⚡
Incremental Computation
A Tale of Two Standards,
POSIX
and
Win32
(2005)
samba.org
·
3d
·
Discuss:
Hacker News
🔐
Capability Systems
Easy 6502 by
skilldrick
skilldrick.github.io
·
5d
🌳
Instruction Selection
Hoot
: Scheme on
WebAssembly
spritely.institute
·
3d
·
Discuss:
Hacker News
🕸️
WebAssembly
Flow-Based Programming:
Seminal
Texts and
Theoretical
Foundations
repolex.ai
·
5d
·
Discuss:
Hacker News
🔄
Concurrency Models
Real world
scenario
of
refactoring
legacy code to strategy & chain of responsibility patterns
dev.to
·
1d
·
Discuss:
DEV
🏰
Tower
The Future of Systems
novlabs.ai
·
3d
·
Discuss:
Hacker News
🏗️
Systems Design
Equilibria: Fair Multi-Tenant
CXL
Memory
Tiering
At Scale
arxiv.org
·
1d
🔌
CXL
From
Diagram
to Code with
Kiro
CLI & Claude Opus 4.6
dev.to
·
1d
·
Discuss:
DEV
📡
Event-Driven Architecture
Tiny
C
Compiler
bellard.org
·
3d
·
Discuss:
Hacker News
📏
Picolibc
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