Skip to main content
Scour
Browse
Getting Started
Login
Sign Up
You are offline. Trying to reconnect...
Close
Copied to clipboard
Close
Unable to share or copy to clipboard
Close
🔌 FPGA Programming
HDL, Verilog, VHDL, Hardware Synthesis, Reconfigurable Computing
Filter Results
Timeframe
Fresh
Past Hour
Today
This Week
This Month
Feeds to Scour
Subscribed
All
Scoured
145103
posts in
27.5
ms
The
RISC
Concept - A Survey of
Implementations
inf.fu-berlin.de
·
1d
🏗
Computer Architecture
TorchLean
:
Formalizing
Neural Networks in Lean
leandojo.org
·
2h
·
Discuss:
Hacker News
🔥
PyTorch
Bitwise
Systolic
Array Architecture for
Runtime-Reconfigurable
Multi-precision Quantized Multiplication on Hardware Accelerators
arxiv.org
·
2d
⚡
Hardware Acceleration
Build your soft
Risc-V
with
XO4
in no time
hackster.io
·
21h
⚡
RISC-V
AI Starting To
Simplify
Design Of
Programmable
Logic
semiengineering.com
·
2d
🎭
Program Synthesis
From theory to hardware:
Cristian
Castro
Lagos
on control engineering with Arduino
blog.arduino.cc
·
2d
🔌
Embedded Systems
Why
Embedded
Systems
Deserve
Their Own Machine Learning Library
dev.to
·
1d
·
Discuss:
DEV
📏
Picolibc
Petter
Reinholdtsen
: Free software toolchain for the simplest RISC-V CPU in a small FPGA?
hungry.com
·
1d
⚡
RISC-V
Metrics
for
spin-based
computing
nature.com
·
2d
⚡
Hardware Acceleration
DeepSeek updated its low-level operator library
DeepGEMM
, basically confirming the implementation of
mHC
and next-generation hardware support in V4
github.com
·
1d
·
Discuss:
r/LocalLLaMA
🍱
Nom
Siemens
Agentic Toolkit
Automates
Chip Verification Workflows
embedded.com
·
1d
📐
TLA+
I Built an Interactive System
Verilog
Tutorial
thomasnormal.github.io
·
2d
·
Discuss:
r/programming
⚙️
Cranelift Codegen
Interconnect-Aware
Logic
Resynthesis
for Multi-Die FPGAs
arxiv.org
·
5d
🌐
Omnipath
Active cooling device: A
flexible
, lab-scale experimental unit to develop
spatio-temporal
temperature control strategies
sciencedirect.com
·
18h
🎛️
SmartNICs
I designed an
MMU-less
5-stage RISC-V CPU entirely with Generative AI (With full
debug
support & verification)
github.com
·
1d
·
Discuss:
r/embedded
⚡
RISC-V
Differential
Logic
• 14
inquiryintoinquiry.com
·
12h
🧮
Algebraic Effects
TENSURE
: Fuzzing Sparse Tensor
Compilers
(Registered Report)
ndss-symposium.org
·
4h
·
Discuss:
Hacker News
🤖
TVM
Dell
PowerEdge
XE7740
: Inside the Architecture of Enterprise AI Inference
storagereview.com
·
1d
🔌
CXL
Hello
Walter
! Learning Rust on
ESP32
blog.matthewbrunelle.com
·
7h
🔧
Embedded Rust
[
GSoC
2026] Implement
UFSHCI
driver
discuss.haiku-os.org
·
6h
🎮
QEMU TCG
Loading...
Loading more...
Page 2 »
Keyboard Shortcuts
Navigation
Next / previous item
j
/
k
Open post
o
or
Enter
Preview post
v
Post Actions
Love post
a
Like post
l
Dislike post
d
Undo reaction
u
Recommendations
Add interest / feed
Enter
Not interested
x
Go to
Home
g
h
Interests
g
i
Feeds
g
f
Likes
g
l
History
g
y
Changelog
g
c
Settings
g
s
Browse
g
b
Search
/
Pagination
Next page
n
Previous page
p
General
Show this help
?
Submit feedback
!
Close modal / unfocus
Esc
Press
?
anytime to show this help