🔌 FPGA Programming - hello · Scour

The State of Open-Source EDA Tools: Breaking Open-EDA for ASIC Chip Flow ⚡Hardware Acceleration

saadsiddiqui138117.substack.com·1d·Substack

Back to the Building Blocks’ Building Blocks 🚧Memory Barriers

cs.cornell.edu·6d·Lobsters, Hacker News

trholding/shrike-gen: CLI project scaffolding and build toolchain for Vicharak's Shrike FPGA Board and the Renesas SLG47910V (ForgeFPGA) FPGA. ⚙️Cranelift Codegen

github.com·20h·Hacker News

ModRetro M64 Uses AMD FPGA Tech To Revive And Revamp The Nintendo 64 🕹️Retro Gaming

hothardware.com·4h

Alinx HEA13 combines AMD Virtex UltraScale+ VU13P FPGA and NVIDIA Jetson Thor ⚡RISC-V

Location: New York City area, USA Remote: Yes, also open to on-site Willing to r... 🏠Home Automation

news.ycombinator.com·6h·Hacker News

Verilog-Evolve: Feedback-Driven and Skill-Evolving Verilog Generation ⚙️JIT Compilation

MiSTer FPGA News – New PC Core, Atari Star Wars, Darius 2 & More 🎮QEMU TCG

retrorgb.com·11h

AMD leaves Linux FPGA users in the lurch with controversial Vivado licensing update — new tier model restricts future free versions to Windows 🛡️AMD SEV

tomshardware.com

·6d

Modos Flow – An FPGA-based 13.3-inch USB-C touchscreen e-paper monitor (Crowdfunding) 🔌Embedded Systems

cnx-software.com·5d

Comet A13 evaluation kit showcases Agilex 5 SoC FPGA with Linux support ⚡Hardware Acceleration

AMD pulls a bait-and-switch on Linux users with Vivado licensing changes 🛡️AMD SEV

lemmy.world·4d

z386: An Open-Source 80386 Built Around Original Microcode ⚙️CPU Microarchitecture

hackaday.com·6d

tylrcc/tapeline: A small piece of FPGA hardware that works out live price averages (moving average and VWAP) as trades come in, so the trading software doesn't have to. ⚙️LMAX Architecture

github.com·4h·Hacker News

LUNA – a toolkit for working with USB using FPGA technology 🎛️SmartNICs

blog.adafruit.com·5d

EventShiftFlow: Towards Hardware-efficient FPGA-based Flow Estimation 🎛️SmartNICs

nova-studios-hw/novagpu-ts1t: N.E.O.N. Architecture — Open source GPU RTL in Verilog. Token dataflow, hardware ray tracing, frame generation. First silicon target: 28nm. ⚡Hardware Acceleration

github.com·4d·Hacker News

Context-aware Simopt-Power: Using structural data with simulation metadata to optimise FPGA designs 🎲Hardware Branch Prediction

SpecAlign: A Semantic Alignment Framework for SystemVerilog Assertion Generation 🏗️MLIR

Comet A13 evaluation kit showcases Agilex 5 SoC FPGA with Linux support ⚡Hardware Acceleration

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