Heterogeneous Computing, GPU Programming, Kernels, SPIR-V

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CUDA Programming: From Zero to GPU Kernels
pythongiant.github.io·8h·
Discuss: Hacker News
🎮SIMT Execution
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GPU as a Service: Revolutionizing Compute Power for Modern Workloads
future.forem.com·7h·
Discuss: DEV
🎨WGPU
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Pushing the Packed SIMD Extension Over the Line: An Update on the Progress of Key RISC-V Extension
semiwiki.com·1d
📏Picolibc
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Wannier-function software ecosystem for materials simulations
link.aps.org·12h
🕸️GraphBLAS
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A Two-Stage GPU Kernel Tuner Combining Semantic Refactoring and Search-Based Optimization
arxiv.org·14h
BOLT
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**Abstract:** This research proposes a novel approach to dynamic resource allocation within CUDA Streaming Multiprocessors (SMs) to enhance performance and e...
freederia.com·1d
🧩mimalloc
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istmarc/tenseur: C++23 Tensor, neural networks and mathematical library
github.com·54m·
Discuss: r/cpp
⚙️XLA
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Nvidia's long-rumored N1X Arm chip pairs a 20-core CPU with RTX graphics
techspot.com·8h
Hardware Acceleration
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oneAPI DPC++ Compiler and Runtime architecture design — oneAPI DPC++ Compiler documentation
intel.github.io·1d
🔨Incremental Compilation
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Deep reinforcement learning real-time dispatch approach for cascade hydropower with hybrid pumped-storage mitigating photovoltaic uncertainties
sciencedirect.com·7h
🎯Reinforcement Learning
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Scientific Computing in Rust Monthly #14
scientificcomputing.rs·7h
🦀Rust Macros
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(PR) Sparkle Launches Intel Arc Pro B60 24 GB Blower and 48 GB Passive GPUs
techpowerup.com·1h
Hardware Acceleration
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Sculpting complex 3D nanostructures with a focused ion beam
phys.org·9h
LMAX Disruptor
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FlashAttention 4: Faster, Memory-Efficient Attention for LLMs
digitalocean.com·7h
🔄Hardware Transactional Memory
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Chinese semiconductor industry gears up for domestic HBM3 production by the end of 2026 — CXMT to produce chips, while Naura, Maxwell, and U-Preseason design tools for assembly
tomshardware.com
·2h
💾HBM
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Everyone deserves a better computer | Ahead Computing
aheadcomputing.com·3h·
Discuss: Hacker News
🏗Computer Architecture
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Scheme implementation as O’Reilly book via Claude Code
ezzeriesa.notion.site·1d·
Discuss: Hacker News
🦀Rust Macros
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Managing HWRT in Instance-Heavy Scenes
real-mrbeam.github.io·6h·
Discuss: Hacker News
🌟Ray Tracing
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PI Introduces Miniaturized Alignment Engine Platform for Scalable, Parallel E/O Wafer-Level Test
prnewswire.com·6h
🧠PIM
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Addressing Critical Tradeoffs In NPU Design
semiengineering.com·11h
🏗️System Design
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