🔀 SIMD Programming - hello · Scour

Automatic Vectorization ⚡SIMD Optimization

en.wikipedia.org·2d·Hacker News

CUTEv2: Unified and Configurable Matrix Extension for Diverse CPU Architectures with Minimal Design Overhead ⚡Hardware Acceleration

arxiv.org·17h

Data Oriented Design by example (2017) ⚡Cache Optimization

nikitablack.github.io·4d·Hacker News

Towards O(1) Computing: Minimizing System Entropy with Data-Centric High-Frequency Processing ⚙️Systems Programming

dev.to·1d·DEV

naresh-cn2/Axiom-Turbo-IO: High-performance C-engine for parallel data processing. Parses 10M rows in 0.08s using multithreaded mmap. 🌀Naiad

github.com·3d·DEV

SOTA Normalization Performance with Torch.compile 🔧LLVM IR Optimization

pytorch.org·6d·Hacker News

Solution for a high performance data lake 🌀Naiad

beacon.maris.nl·4d

AEG: A Baremetal Framework for AI Acceleration via Direct Hardware Access in Heterogeneous Accelerators ⚡Hardware Acceleration

arxiv.org·17h

SPEED-Bench: A Unified and Diverse Benchmark for Speculative Decoding 📦Folly

arxiv.org·17h

MysticCodingCat/CUDA-Native-HUBO: A GPU-native solver for 3-way combinatorial optimization (HUBO). Achieving digital-annealer-level performance on a single RTX 3060 Ti 🔄Glommio vs Tokio

github.com·5d·Hacker News

Sustaining Exascale Performance: Lessons from HPL and HPL-MxP on Aurora 🤝Paxos

arxiv.org·1d·Hacker News

Vector Database Performance Compared: pgvector vs Pinecone vs Qdrant vs Weaviate 🔢Pgvector

dev.to·5d·DEV

Unlock AI at the Edge: High-Performance Inference with WebAssembly and ONNX 📱Edge AI

dev.to·6d·DEV

A Full-Stack Performance Evaluation Infrastructure for 3D-DRAM-based LLM Accelerators 🌊Memory Bandwidth

arxiv.org·4d

Sparsity-Aware Roofline Models for Sparse Matrix-Matrix Multiplication 🔢Sparse Matrices

arxiv.org·5d

Wattlytics: A Web Platform for Co-Optimizing Performance, Energy, and TCO in HPC Clusters 🏗️System Design

arxiv.org·4d

Making Room for AI: Multi-GPU Molecular Dynamics with Deep Potentials in GROMACS 🚀Milvus

arxiv.org·5d

Analyzing Persistent Alltoallv RMA Implementations for High-Performance MPI Communication ⚡RDMA

arxiv.org·6d

SepSeq: A Training-Free Framework for Long Numerical Sequence Processing in LLMs 🌀Naiad

arxiv.org·4d

PHAROS: Pipelined Heterogeneous Accelerators for Real-time Safety-critical Systems With Deadline Compliance ⚡Hardware Acceleration

arxiv.org·6d

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