Synchronization, Busy-Waiting, Kernel Programming, Low-Level

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Reduction for Structured Concurrent Programs
arxiv.org·1d
🔓Lock-Free Programming
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Lock Management Inside a Process: Why Native Locks Alone Are Not Enough
dev.to·16h·
Discuss: DEV
🔒Futex
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The Real Tenstorrent Tensix Programming Model (FOSDEM 2026 draft)
clehaxze.tw·13m
Hardware Acceleration
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A Novel Side-channel Attack That Utilizes Memory Re-orderings (U. of Washington, Duke, UCSC et al.)
semiengineering.com·17h
🔄Hardware Transactional Memory
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Clockworker: single-threaded async executor with powerful scheduling to sit on top of async runtimes
github.com·2d·
Discuss: r/rust
Tokio Runtime
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CAP Theorem Explained: Beyond the "Pick Two" Myth
blog.ahmazin.dev·5h·
Discuss: Hacker News
🔺CAP Theorem
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Intrinsic back-switching phenomenon in spin-orbit torque MRAM devices
link.aps.org·1d
🔄Hardware Transactional Memory
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Issue 508
haskellweekly.news·56m
λFunctional Programming
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Why Your Linux Server “Looks Idle” but “Feels” Slow
linuxblog.io·22m
📊Linux Perf Events
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FlashAttention 4: Faster, Memory-Efficient Attention for LLMs
digitalocean.com·1d
🔄Hardware Transactional Memory
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Real-Time Data Stream Processing in Go: Backpressure, Windowing, and Fault Tolerance Explained
dev.to·22h·
Discuss: DEV
Timely Dataflow
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SHADOW: Simultaneous Multi-Threading Architecture with Asymmetric Threads
danglingpointers.substack.com·1d·
Discuss: Substack
🧵Lightweight Threads
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Binary Algorithms
exystence.net·1d
⏭️Skip Lists
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Unikernels are unfit for production
tritondatacenter.com·1h
🐧Linux
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Streamlining CUB with a Single-Call API
developer.nvidia.com·14h
🧩mimalloc
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CUDA Programming: From Zero to GPU Kernels
pythongiant.github.io·1d·
Discuss: Hacker News
🎮SIMT Execution
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A Myhill-Nerode Characterization and Active Learning for One-Clock Timed Automata
arxiv.org·7h
🌊Noria
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CodeSOD: Well Timed Double Checking
thedailywtf.com·2d
🔓Binary Exploitation
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Heaps do lie: debugging a memory leak in vLLM.
mistral.ai·20h·
Discuss: Hacker News
📊Cachegrind
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One ISA, Infinite Use Cases: RISC-V and the Road to Workload-Specific Silicon
riscv.org·16h
RISC-V
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